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  1. /**
  2. ******************************************************************************
  3. * @file stm32f0xx_hal_i2c.h
  4. * @author MCD Application Team
  5. * @brief Header file of I2C HAL module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
  10. *
  11. * Redistribution and use in source and binary forms, with or without modification,
  12. * are permitted provided that the following conditions are met:
  13. * 1. Redistributions of source code must retain the above copyright notice,
  14. * this list of conditions and the following disclaimer.
  15. * 2. Redistributions in binary form must reproduce the above copyright notice,
  16. * this list of conditions and the following disclaimer in the documentation
  17. * and/or other materials provided with the distribution.
  18. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  19. * may be used to endorse or promote products derived from this software
  20. * without specific prior written permission.
  21. *
  22. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  23. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  24. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  25. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  26. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  27. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  28. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  29. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  30. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32. *
  33. ******************************************************************************
  34. */
  35. /* Define to prevent recursive inclusion -------------------------------------*/
  36. #ifndef __STM32F0xx_HAL_I2C_H
  37. #define __STM32F0xx_HAL_I2C_H
  38. #ifdef __cplusplus
  39. extern "C" {
  40. #endif
  41. /* Includes ------------------------------------------------------------------*/
  42. #include "stm32f0xx_hal_def.h"
  43. #include <stdbool.h>
  44. /** @addtogroup STM32F0xx_HAL_Driver
  45. * @{
  46. */
  47. /** @addtogroup I2C
  48. * @{
  49. */
  50. /* Exported types ------------------------------------------------------------*/
  51. /** @defgroup I2C_Exported_Types I2C Exported Types
  52. * @{
  53. */
  54. /** @defgroup I2C_Configuration_Structure_definition I2C Configuration Structure definition
  55. * @brief I2C Configuration Structure definition
  56. * @{
  57. */
  58. typedef struct
  59. {
  60. uint32_t Timing; /*!< Specifies the I2C_TIMINGR_register value.
  61. This parameter calculated by referring to I2C initialization
  62. section in Reference manual */
  63. uint32_t OwnAddress1; /*!< Specifies the first device own address.
  64. This parameter can be a 7-bit or 10-bit address. */
  65. uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode is selected.
  66. This parameter can be a value of @ref I2C_ADDRESSING_MODE */
  67. uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected.
  68. This parameter can be a value of @ref I2C_DUAL_ADDRESSING_MODE */
  69. uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected
  70. This parameter can be a 7-bit address. */
  71. uint32_t OwnAddress2Masks; /*!< Specifies the acknowledge mask address second device own address if dual addressing mode is selected
  72. This parameter can be a value of @ref I2C_OWN_ADDRESS2_MASKS */
  73. uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected.
  74. This parameter can be a value of @ref I2C_GENERAL_CALL_ADDRESSING_MODE */
  75. uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected.
  76. This parameter can be a value of @ref I2C_NOSTRETCH_MODE */
  77. } I2C_InitTypeDef;
  78. /**
  79. * @}
  80. */
  81. /** @defgroup HAL_state_structure_definition HAL state structure definition
  82. * @brief HAL State structure definition
  83. * @note HAL I2C State value coding follow below described bitmap :\n
  84. * b7-b6 Error information\n
  85. * 00 : No Error\n
  86. * 01 : Abort (Abort user request on going)\n
  87. * 10 : Timeout\n
  88. * 11 : Error\n
  89. * b5 IP initilisation status\n
  90. * 0 : Reset (IP not initialized)\n
  91. * 1 : Init done (IP initialized and ready to use. HAL I2C Init function called)\n
  92. * b4 (not used)\n
  93. * x : Should be set to 0\n
  94. * b3\n
  95. * 0 : Ready or Busy (No Listen mode ongoing)\n
  96. * 1 : Listen (IP in Address Listen Mode)\n
  97. * b2 Intrinsic process state\n
  98. * 0 : Ready\n
  99. * 1 : Busy (IP busy with some configuration or internal operations)\n
  100. * b1 Rx state\n
  101. * 0 : Ready (no Rx operation ongoing)\n
  102. * 1 : Busy (Rx operation ongoing)\n
  103. * b0 Tx state\n
  104. * 0 : Ready (no Tx operation ongoing)\n
  105. * 1 : Busy (Tx operation ongoing)
  106. * @{
  107. */
  108. typedef enum
  109. {
  110. HAL_I2C_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized */
  111. HAL_I2C_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use */
  112. HAL_I2C_STATE_BUSY = 0x24U, /*!< An internal process is ongoing */
  113. HAL_I2C_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing */
  114. HAL_I2C_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */
  115. HAL_I2C_STATE_LISTEN = 0x28U, /*!< Address Listen Mode is ongoing */
  116. HAL_I2C_STATE_BUSY_TX_LISTEN = 0x29U, /*!< Address Listen Mode and Data Transmission
  117. process is ongoing */
  118. HAL_I2C_STATE_BUSY_RX_LISTEN = 0x2AU, /*!< Address Listen Mode and Data Reception
  119. process is ongoing */
  120. HAL_I2C_STATE_ABORT = 0x60U, /*!< Abort user request ongoing */
  121. HAL_I2C_STATE_TIMEOUT = 0xA0U, /*!< Timeout state */
  122. HAL_I2C_STATE_ERROR = 0xE0U /*!< Error */
  123. } HAL_I2C_StateTypeDef;
  124. /**
  125. * @}
  126. */
  127. /** @defgroup HAL_mode_structure_definition HAL mode structure definition
  128. * @brief HAL Mode structure definition
  129. * @note HAL I2C Mode value coding follow below described bitmap :\n
  130. * b7 (not used)\n
  131. * x : Should be set to 0\n
  132. * b6\n
  133. * 0 : None\n
  134. * 1 : Memory (HAL I2C communication is in Memory Mode)\n
  135. * b5\n
  136. * 0 : None\n
  137. * 1 : Slave (HAL I2C communication is in Slave Mode)\n
  138. * b4\n
  139. * 0 : None\n
  140. * 1 : Master (HAL I2C communication is in Master Mode)\n
  141. * b3-b2-b1-b0 (not used)\n
  142. * xxxx : Should be set to 0000
  143. * @{
  144. */
  145. typedef enum
  146. {
  147. HAL_I2C_MODE_NONE = 0x00U, /*!< No I2C communication on going */
  148. HAL_I2C_MODE_MASTER = 0x10U, /*!< I2C communication is in Master Mode */
  149. HAL_I2C_MODE_SLAVE = 0x20U, /*!< I2C communication is in Slave Mode */
  150. HAL_I2C_MODE_MEM = 0x40U /*!< I2C communication is in Memory Mode */
  151. } HAL_I2C_ModeTypeDef;
  152. /**
  153. * @}
  154. */
  155. /** @defgroup I2C_Error_Code_definition I2C Error Code definition
  156. * @brief I2C Error Code definition
  157. * @{
  158. */
  159. #define HAL_I2C_ERROR_NONE (0x00000000U) /*!< No error */
  160. #define HAL_I2C_ERROR_BERR (0x00000001U) /*!< BERR error */
  161. #define HAL_I2C_ERROR_ARLO (0x00000002U) /*!< ARLO error */
  162. #define HAL_I2C_ERROR_AF (0x00000004U) /*!< ACKF error */
  163. #define HAL_I2C_ERROR_OVR (0x00000008U) /*!< OVR error */
  164. #define HAL_I2C_ERROR_DMA (0x00000010U) /*!< DMA transfer error */
  165. #define HAL_I2C_ERROR_TIMEOUT (0x00000020U) /*!< Timeout error */
  166. #define HAL_I2C_ERROR_SIZE (0x00000040U) /*!< Size Management error */
  167. /**
  168. * @}
  169. */
  170. /** @defgroup I2C_handle_Structure_definition I2C handle Structure definition
  171. * @brief I2C handle Structure definition
  172. * @{
  173. */
  174. typedef struct __I2C_HandleTypeDef
  175. {
  176. I2C_TypeDef *Instance; /*!< I2C registers base address */
  177. I2C_InitTypeDef Init; /*!< I2C communication parameters */
  178. uint8_t *pBuffPtr; /*!< Pointer to I2C transfer buffer */
  179. uint16_t XferSize; /*!< I2C transfer size */
  180. __IO uint16_t XferCount; /*!< I2C transfer counter */
  181. __IO uint32_t XferOptions; /*!< I2C sequantial transfer options, this parameter can
  182. be a value of @ref I2C_XFEROPTIONS */
  183. __IO uint32_t PreviousState; /*!< I2C communication Previous state */
  184. HAL_StatusTypeDef(*XferISR)(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources); /*!< I2C transfer IRQ handler function pointer */
  185. DMA_HandleTypeDef *hdmatx; /*!< I2C Tx DMA handle parameters */
  186. DMA_HandleTypeDef *hdmarx; /*!< I2C Rx DMA handle parameters */
  187. HAL_LockTypeDef Lock; /*!< I2C locking object */
  188. __IO HAL_I2C_StateTypeDef State; /*!< I2C communication state */
  189. __IO HAL_I2C_ModeTypeDef Mode; /*!< I2C communication mode */
  190. __IO uint32_t ErrorCode; /*!< I2C Error code */
  191. __IO uint32_t AddrEventCount; /*!< I2C Address Event counter */
  192. } I2C_HandleTypeDef;
  193. /**
  194. * @}
  195. */
  196. /**
  197. * @}
  198. */
  199. /* Exported constants --------------------------------------------------------*/
  200. /** @defgroup I2C_Exported_Constants I2C Exported Constants
  201. * @{
  202. */
  203. /** @defgroup I2C_XFEROPTIONS I2C Sequential Transfer Options
  204. * @{
  205. */
  206. #define I2C_FIRST_FRAME ((uint32_t)I2C_SOFTEND_MODE)
  207. #define I2C_FIRST_AND_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE))
  208. #define I2C_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE))
  209. #define I2C_FIRST_AND_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE)
  210. #define I2C_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE)
  211. /**
  212. * @}
  213. */
  214. /** @defgroup I2C_ADDRESSING_MODE I2C Addressing Mode
  215. * @{
  216. */
  217. #define I2C_ADDRESSINGMODE_7BIT (0x00000001U)
  218. #define I2C_ADDRESSINGMODE_10BIT (0x00000002U)
  219. /**
  220. * @}
  221. */
  222. /** @defgroup I2C_DUAL_ADDRESSING_MODE I2C Dual Addressing Mode
  223. * @{
  224. */
  225. #define I2C_DUALADDRESS_DISABLE (0x00000000U)
  226. #define I2C_DUALADDRESS_ENABLE I2C_OAR2_OA2EN
  227. /**
  228. * @}
  229. */
  230. /** @defgroup I2C_OWN_ADDRESS2_MASKS I2C Own Address2 Masks
  231. * @{
  232. */
  233. #define I2C_OA2_NOMASK ((uint8_t)0x00U)
  234. #define I2C_OA2_MASK01 ((uint8_t)0x01U)
  235. #define I2C_OA2_MASK02 ((uint8_t)0x02U)
  236. #define I2C_OA2_MASK03 ((uint8_t)0x03U)
  237. #define I2C_OA2_MASK04 ((uint8_t)0x04U)
  238. #define I2C_OA2_MASK05 ((uint8_t)0x05U)
  239. #define I2C_OA2_MASK06 ((uint8_t)0x06U)
  240. #define I2C_OA2_MASK07 ((uint8_t)0x07U)
  241. /**
  242. * @}
  243. */
  244. /** @defgroup I2C_GENERAL_CALL_ADDRESSING_MODE I2C General Call Addressing Mode
  245. * @{
  246. */
  247. #define I2C_GENERALCALL_DISABLE (0x00000000U)
  248. #define I2C_GENERALCALL_ENABLE I2C_CR1_GCEN
  249. /**
  250. * @}
  251. */
  252. /** @defgroup I2C_NOSTRETCH_MODE I2C No-Stretch Mode
  253. * @{
  254. */
  255. #define I2C_NOSTRETCH_DISABLE (0x00000000U)
  256. #define I2C_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH
  257. /**
  258. * @}
  259. */
  260. /** @defgroup I2C_MEMORY_ADDRESS_SIZE I2C Memory Address Size
  261. * @{
  262. */
  263. #define I2C_MEMADD_SIZE_8BIT (0x00000001U)
  264. #define I2C_MEMADD_SIZE_16BIT (0x00000002U)
  265. /**
  266. * @}
  267. */
  268. /** @defgroup I2C_XFERDIRECTION I2C Transfer Direction Master Point of View
  269. * @{
  270. */
  271. #define I2C_DIRECTION_TRANSMIT (0x00000000U)
  272. #define I2C_DIRECTION_RECEIVE (0x00000001U)
  273. /**
  274. * @}
  275. */
  276. /** @defgroup I2C_RELOAD_END_MODE I2C Reload End Mode
  277. * @{
  278. */
  279. #define I2C_RELOAD_MODE I2C_CR2_RELOAD
  280. #define I2C_AUTOEND_MODE I2C_CR2_AUTOEND
  281. #define I2C_SOFTEND_MODE (0x00000000U)
  282. /**
  283. * @}
  284. */
  285. /** @defgroup I2C_START_STOP_MODE I2C Start or Stop Mode
  286. * @{
  287. */
  288. #define I2C_NO_STARTSTOP (0x00000000U)
  289. #define I2C_GENERATE_STOP I2C_CR2_STOP
  290. #define I2C_GENERATE_START_READ (uint32_t)(I2C_CR2_START | I2C_CR2_RD_WRN)
  291. #define I2C_GENERATE_START_WRITE I2C_CR2_START
  292. /**
  293. * @}
  294. */
  295. /** @defgroup I2C_Interrupt_configuration_definition I2C Interrupt configuration definition
  296. * @brief I2C Interrupt definition
  297. * Elements values convention: 0xXXXXXXXX
  298. * - XXXXXXXX : Interrupt control mask
  299. * @{
  300. */
  301. #define I2C_IT_ERRI I2C_CR1_ERRIE
  302. #define I2C_IT_TCI I2C_CR1_TCIE
  303. #define I2C_IT_STOPI I2C_CR1_STOPIE
  304. #define I2C_IT_NACKI I2C_CR1_NACKIE
  305. #define I2C_IT_ADDRI I2C_CR1_ADDRIE
  306. #define I2C_IT_RXI I2C_CR1_RXIE
  307. #define I2C_IT_TXI I2C_CR1_TXIE
  308. /**
  309. * @}
  310. */
  311. /** @defgroup I2C_Flag_definition I2C Flag definition
  312. * @{
  313. */
  314. #define I2C_FLAG_TXE I2C_ISR_TXE
  315. #define I2C_FLAG_TXIS I2C_ISR_TXIS
  316. #define I2C_FLAG_RXNE I2C_ISR_RXNE
  317. #define I2C_FLAG_ADDR I2C_ISR_ADDR
  318. #define I2C_FLAG_AF I2C_ISR_NACKF
  319. #define I2C_FLAG_STOPF I2C_ISR_STOPF
  320. #define I2C_FLAG_TC I2C_ISR_TC
  321. #define I2C_FLAG_TCR I2C_ISR_TCR
  322. #define I2C_FLAG_BERR I2C_ISR_BERR
  323. #define I2C_FLAG_ARLO I2C_ISR_ARLO
  324. #define I2C_FLAG_OVR I2C_ISR_OVR
  325. #define I2C_FLAG_PECERR I2C_ISR_PECERR
  326. #define I2C_FLAG_TIMEOUT I2C_ISR_TIMEOUT
  327. #define I2C_FLAG_ALERT I2C_ISR_ALERT
  328. #define I2C_FLAG_BUSY I2C_ISR_BUSY
  329. #define I2C_FLAG_DIR I2C_ISR_DIR
  330. /**
  331. * @}
  332. */
  333. /**
  334. * @}
  335. */
  336. /* Exported macros -----------------------------------------------------------*/
  337. /** @defgroup I2C_Exported_Macros I2C Exported Macros
  338. * @{
  339. */
  340. /** @brief Reset I2C handle state.
  341. * @param __HANDLE__ specifies the I2C Handle.
  342. * @retval None
  343. */
  344. #define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET)
  345. /** @brief Enable the specified I2C interrupt.
  346. * @param __HANDLE__ specifies the I2C Handle.
  347. * @param __INTERRUPT__ specifies the interrupt source to enable.
  348. * This parameter can be one of the following values:
  349. * @arg @ref I2C_IT_ERRI Errors interrupt enable
  350. * @arg @ref I2C_IT_TCI Transfer complete interrupt enable
  351. * @arg @ref I2C_IT_STOPI STOP detection interrupt enable
  352. * @arg @ref I2C_IT_NACKI NACK received interrupt enable
  353. * @arg @ref I2C_IT_ADDRI Address match interrupt enable
  354. * @arg @ref I2C_IT_RXI RX interrupt enable
  355. * @arg @ref I2C_IT_TXI TX interrupt enable
  356. *
  357. * @retval None
  358. */
  359. #define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__))
  360. /** @brief Disable the specified I2C interrupt.
  361. * @param __HANDLE__ specifies the I2C Handle.
  362. * @param __INTERRUPT__ specifies the interrupt source to disable.
  363. * This parameter can be one of the following values:
  364. * @arg @ref I2C_IT_ERRI Errors interrupt enable
  365. * @arg @ref I2C_IT_TCI Transfer complete interrupt enable
  366. * @arg @ref I2C_IT_STOPI STOP detection interrupt enable
  367. * @arg @ref I2C_IT_NACKI NACK received interrupt enable
  368. * @arg @ref I2C_IT_ADDRI Address match interrupt enable
  369. * @arg @ref I2C_IT_RXI RX interrupt enable
  370. * @arg @ref I2C_IT_TXI TX interrupt enable
  371. *
  372. * @retval None
  373. */
  374. #define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__)))
  375. /** @brief Check whether the specified I2C interrupt source is enabled or not.
  376. * @param __HANDLE__ specifies the I2C Handle.
  377. * @param __INTERRUPT__ specifies the I2C interrupt source to check.
  378. * This parameter can be one of the following values:
  379. * @arg @ref I2C_IT_ERRI Errors interrupt enable
  380. * @arg @ref I2C_IT_TCI Transfer complete interrupt enable
  381. * @arg @ref I2C_IT_STOPI STOP detection interrupt enable
  382. * @arg @ref I2C_IT_NACKI NACK received interrupt enable
  383. * @arg @ref I2C_IT_ADDRI Address match interrupt enable
  384. * @arg @ref I2C_IT_RXI RX interrupt enable
  385. * @arg @ref I2C_IT_TXI TX interrupt enable
  386. *
  387. * @retval The new state of __INTERRUPT__ (SET or RESET).
  388. */
  389. #define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
  390. /** @brief Check whether the specified I2C flag is set or not.
  391. * @param __HANDLE__ specifies the I2C Handle.
  392. * @param __FLAG__ specifies the flag to check.
  393. * This parameter can be one of the following values:
  394. * @arg @ref I2C_FLAG_TXE Transmit data register empty
  395. * @arg @ref I2C_FLAG_TXIS Transmit interrupt status
  396. * @arg @ref I2C_FLAG_RXNE Receive data register not empty
  397. * @arg @ref I2C_FLAG_ADDR Address matched (slave mode)
  398. * @arg @ref I2C_FLAG_AF Acknowledge failure received flag
  399. * @arg @ref I2C_FLAG_STOPF STOP detection flag
  400. * @arg @ref I2C_FLAG_TC Transfer complete (master mode)
  401. * @arg @ref I2C_FLAG_TCR Transfer complete reload
  402. * @arg @ref I2C_FLAG_BERR Bus error
  403. * @arg @ref I2C_FLAG_ARLO Arbitration lost
  404. * @arg @ref I2C_FLAG_OVR Overrun/Underrun
  405. * @arg @ref I2C_FLAG_PECERR PEC error in reception
  406. * @arg @ref I2C_FLAG_TIMEOUT Timeout or Tlow detection flag
  407. * @arg @ref I2C_FLAG_ALERT SMBus alert
  408. * @arg @ref I2C_FLAG_BUSY Bus busy
  409. * @arg @ref I2C_FLAG_DIR Transfer direction (slave mode)
  410. *
  411. * @retval The new state of __FLAG__ (SET or RESET).
  412. */
  413. #define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) == (__FLAG__)) ? SET : RESET)
  414. /** @brief Clear the I2C pending flags which are cleared by writing 1 in a specific bit.
  415. * @param __HANDLE__ specifies the I2C Handle.
  416. * @param __FLAG__ specifies the flag to clear.
  417. * This parameter can be any combination of the following values:
  418. * @arg @ref I2C_FLAG_TXE Transmit data register empty
  419. * @arg @ref I2C_FLAG_ADDR Address matched (slave mode)
  420. * @arg @ref I2C_FLAG_AF Acknowledge failure received flag
  421. * @arg @ref I2C_FLAG_STOPF STOP detection flag
  422. * @arg @ref I2C_FLAG_BERR Bus error
  423. * @arg @ref I2C_FLAG_ARLO Arbitration lost
  424. * @arg @ref I2C_FLAG_OVR Overrun/Underrun
  425. * @arg @ref I2C_FLAG_PECERR PEC error in reception
  426. * @arg @ref I2C_FLAG_TIMEOUT Timeout or Tlow detection flag
  427. * @arg @ref I2C_FLAG_ALERT SMBus alert
  428. *
  429. * @retval None
  430. */
  431. #define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__FLAG__) == I2C_FLAG_TXE) ? ((__HANDLE__)->Instance->ISR |= (__FLAG__)) \
  432. : ((__HANDLE__)->Instance->ICR = (__FLAG__)))
  433. /** @brief Enable the specified I2C peripheral.
  434. * @param __HANDLE__ specifies the I2C Handle.
  435. * @retval None
  436. */
  437. #define __HAL_I2C_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE))
  438. /** @brief Disable the specified I2C peripheral.
  439. * @param __HANDLE__ specifies the I2C Handle.
  440. * @retval None
  441. */
  442. #define __HAL_I2C_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE))
  443. /** @brief Generate a Non-Acknowledge I2C peripheral in Slave mode.
  444. * @param __HANDLE__ specifies the I2C Handle.
  445. * @retval None
  446. */
  447. #define __HAL_I2C_GENERATE_NACK(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR2, I2C_CR2_NACK))
  448. /**
  449. * @}
  450. */
  451. /* Include I2C HAL Extended module */
  452. #include "stm32f0xx_hal_i2c_ex.h"
  453. /* Exported functions --------------------------------------------------------*/
  454. /** @addtogroup I2C_Exported_Functions
  455. * @{
  456. */
  457. /** @addtogroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
  458. * @{
  459. */
  460. /* Initialization and de-initialization functions******************************/
  461. HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c);
  462. HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c);
  463. void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c);
  464. void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c);
  465. /**
  466. * @}
  467. */
  468. /** @addtogroup I2C_Exported_Functions_Group2 Input and Output operation functions
  469. * @{
  470. */
  471. /* IO operation functions ****************************************************/
  472. /******* Blocking mode: Polling */
  473. HAL_StatusTypeDef HAL_I2C_Master_Transmit_2(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout, bool send_stop);
  474. HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
  475. HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
  476. HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout);
  477. HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout);
  478. HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
  479. HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
  480. HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout);
  481. /******* Non-Blocking mode: Interrupt */
  482. HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
  483. HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
  484. HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
  485. HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
  486. HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
  487. HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
  488. HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
  489. HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
  490. HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
  491. HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
  492. HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c);
  493. HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c);
  494. HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress);
  495. /******* Non-Blocking mode: DMA */
  496. HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
  497. HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
  498. HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
  499. HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
  500. HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
  501. HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
  502. /**
  503. * @}
  504. */
  505. /** @addtogroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
  506. * @{
  507. */
  508. /******* I2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */
  509. void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c);
  510. void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c);
  511. void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c);
  512. void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c);
  513. void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c);
  514. void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c);
  515. void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode);
  516. void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c);
  517. void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c);
  518. void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c);
  519. void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c);
  520. void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c);
  521. /**
  522. * @}
  523. */
  524. /** @addtogroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions
  525. * @{
  526. */
  527. /* Peripheral State, Mode and Error functions *********************************/
  528. HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c);
  529. HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c);
  530. uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c);
  531. /**
  532. * @}
  533. */
  534. /**
  535. * @}
  536. */
  537. /* Private constants ---------------------------------------------------------*/
  538. /** @defgroup I2C_Private_Constants I2C Private Constants
  539. * @{
  540. */
  541. /**
  542. * @}
  543. */
  544. /* Private macros ------------------------------------------------------------*/
  545. /** @defgroup I2C_Private_Macro I2C Private Macros
  546. * @{
  547. */
  548. #define IS_I2C_ADDRESSING_MODE(MODE) (((MODE) == I2C_ADDRESSINGMODE_7BIT) || \
  549. ((MODE) == I2C_ADDRESSINGMODE_10BIT))
  550. #define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLE) || \
  551. ((ADDRESS) == I2C_DUALADDRESS_ENABLE))
  552. #define IS_I2C_OWN_ADDRESS2_MASK(MASK) (((MASK) == I2C_OA2_NOMASK) || \
  553. ((MASK) == I2C_OA2_MASK01) || \
  554. ((MASK) == I2C_OA2_MASK02) || \
  555. ((MASK) == I2C_OA2_MASK03) || \
  556. ((MASK) == I2C_OA2_MASK04) || \
  557. ((MASK) == I2C_OA2_MASK05) || \
  558. ((MASK) == I2C_OA2_MASK06) || \
  559. ((MASK) == I2C_OA2_MASK07))
  560. #define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLE) || \
  561. ((CALL) == I2C_GENERALCALL_ENABLE))
  562. #define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLE) || \
  563. ((STRETCH) == I2C_NOSTRETCH_ENABLE))
  564. #define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \
  565. ((SIZE) == I2C_MEMADD_SIZE_16BIT))
  566. #define IS_TRANSFER_MODE(MODE) (((MODE) == I2C_RELOAD_MODE) || \
  567. ((MODE) == I2C_AUTOEND_MODE) || \
  568. ((MODE) == I2C_SOFTEND_MODE))
  569. #define IS_TRANSFER_REQUEST(REQUEST) (((REQUEST) == I2C_GENERATE_STOP) || \
  570. ((REQUEST) == I2C_GENERATE_START_READ) || \
  571. ((REQUEST) == I2C_GENERATE_START_WRITE) || \
  572. ((REQUEST) == I2C_NO_STARTSTOP))
  573. #define IS_I2C_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_FIRST_FRAME) || \
  574. ((REQUEST) == I2C_FIRST_AND_NEXT_FRAME) || \
  575. ((REQUEST) == I2C_NEXT_FRAME) || \
  576. ((REQUEST) == I2C_FIRST_AND_LAST_FRAME) || \
  577. ((REQUEST) == I2C_LAST_FRAME))
  578. #define I2C_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_RD_WRN)))
  579. #define I2C_GET_ADDR_MATCH(__HANDLE__) (((__HANDLE__)->Instance->ISR & I2C_ISR_ADDCODE) >> 16U)
  580. #define I2C_GET_DIR(__HANDLE__) (((__HANDLE__)->Instance->ISR & I2C_ISR_DIR) >> 16U)
  581. #define I2C_GET_STOP_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_AUTOEND)
  582. #define I2C_GET_OWN_ADDRESS1(__HANDLE__) ((__HANDLE__)->Instance->OAR1 & I2C_OAR1_OA1)
  583. #define I2C_GET_OWN_ADDRESS2(__HANDLE__) ((__HANDLE__)->Instance->OAR2 & I2C_OAR2_OA2)
  584. #define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x000003FFU)
  585. #define IS_I2C_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FFU)
  586. #define I2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0xFF00U))) >> 8U)))
  587. #define I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FFU))))
  588. #define I2C_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == I2C_ADDRESSINGMODE_7BIT) ? (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_START) | (I2C_CR2_AUTOEND)) & (~I2C_CR2_RD_WRN)) : \
  589. (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_ADD10) | (I2C_CR2_START)) & (~I2C_CR2_RD_WRN)))
  590. /**
  591. * @}
  592. */
  593. /* Private Functions ---------------------------------------------------------*/
  594. /** @defgroup I2C_Private_Functions I2C Private Functions
  595. * @{
  596. */
  597. /* Private functions are defined in stm32f0xx_hal_i2c.c file */
  598. /**
  599. * @}
  600. */
  601. /**
  602. * @}
  603. */
  604. /**
  605. * @}
  606. */
  607. #ifdef __cplusplus
  608. }
  609. #endif
  610. #endif /* __STM32F0xx_HAL_I2C_H */
  611. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/