Initial commit

raspi4_pcie/fp-info-cache

@@ -0,0 +1,8 @@
+1562821660107
+raspi4_pcie
+QFN-68_hack
+QFN, 68 Pin (https://cdn.microsemi.com/documents/1bf6886f-5919-4508-a50b-b1dbf3fdf0f4/download/#page=98), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py
+QFN DFN_QFN
+0
+68
+68

raspi4_pcie/fp-lib-table

@@ -0,0 +1,3 @@
+(fp_lib_table
+  (lib (name raspi4_pcie)(type KiCad)(uri ${KIPRJMOD}/raspi4_pcie.pretty)(options "")(descr ""))
+)

raspi4_pcie/gerber/raspi4_pcie-B_Cu.gbr

@@ -0,0 +1,42 @@
+G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.1.2*
+G04 #@! TF.CreationDate,2019-07-11T07:54:25+02:00*
+G04 #@! TF.ProjectId,raspi4_pcie,72617370-6934-45f7-9063-69652e6b6963,rev?*
+G04 #@! TF.SameCoordinates,Original*
+G04 #@! TF.FileFunction,Copper,L2,Bot*
+G04 #@! TF.FilePolarity,Positive*
+%FSLAX46Y46*%
+G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
+G04 Created by KiCad (PCBNEW 5.1.2) date 2019-07-11 07:54:25*
+%MOMM*%
+%LPD*%
+G04 APERTURE LIST*
+%ADD10C,0.300000*%
+%ADD11C,0.152400*%
+G04 APERTURE END LIST*
+D10*
+X133500000Y-65113500D03*
+X139500000Y-63913500D03*
+X139500000Y-63486500D03*
+X133500000Y-64686500D03*
+D11*
+X133500000Y-65113500D02*
+X133573800Y-65039700D01*
+X133573800Y-65039700D02*
+X133857866Y-65039700D01*
+X133857866Y-65039700D02*
+X135057866Y-63839700D01*
+X139426200Y-63839700D02*
+X135057866Y-63839700D01*
+X139500000Y-63913500D02*
+X139426200Y-63839700D01*
+X133500000Y-64686500D02*
+X133573800Y-64760300D01*
+X133742134Y-64760300D02*
+X134942134Y-63560300D01*
+X133573800Y-64760300D02*
+X133742134Y-64760300D01*
+X139426200Y-63560300D02*
+X134942134Y-63560300D01*
+X139500000Y-63486500D02*
+X139426200Y-63560300D01*
+M02*

raspi4_pcie/gerber/raspi4_pcie-B_Mask.gbr

@@ -0,0 +1,14 @@
+G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.1.2*
+G04 #@! TF.CreationDate,2019-07-11T07:54:25+02:00*
+G04 #@! TF.ProjectId,raspi4_pcie,72617370-6934-45f7-9063-69652e6b6963,rev?*
+G04 #@! TF.SameCoordinates,Original*
+G04 #@! TF.FileFunction,Soldermask,Bot*
+G04 #@! TF.FilePolarity,Negative*
+%FSLAX46Y46*%
+G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
+G04 Created by KiCad (PCBNEW 5.1.2) date 2019-07-11 07:54:25*
+%MOMM*%
+%LPD*%
+G04 APERTURE LIST*
+G04 APERTURE END LIST*
+M02*

raspi4_pcie/gerber/raspi4_pcie-B_SilkS.gbr

@@ -0,0 +1,217 @@
+G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.1.2*
+G04 #@! TF.CreationDate,2019-07-11T07:54:25+02:00*
+G04 #@! TF.ProjectId,raspi4_pcie,72617370-6934-45f7-9063-69652e6b6963,rev?*
+G04 #@! TF.SameCoordinates,Original*
+G04 #@! TF.FileFunction,Legend,Bot*
+G04 #@! TF.FilePolarity,Positive*
+%FSLAX46Y46*%
+G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
+G04 Created by KiCad (PCBNEW 5.1.2) date 2019-07-11 07:54:25*
+%MOMM*%
+%LPD*%
+G04 APERTURE LIST*
+%ADD10C,0.150000*%
+G04 APERTURE END LIST*
+D10*
+X138114285Y-64052380D02*
+X138447619Y-63576190D01*
+X138685714Y-64052380D02*
+X138685714Y-63052380D01*
+X138304761Y-63052380D01*
+X138209523Y-63100000D01*
+X138161904Y-63147619D01*
+X138114285Y-63242857D01*
+X138114285Y-63385714D01*
+X138161904Y-63480952D01*
+X138209523Y-63528571D01*
+X138304761Y-63576190D01*
+X138685714Y-63576190D01*
+X137257142Y-64052380D02*
+X137257142Y-63528571D01*
+X137304761Y-63433333D01*
+X137400000Y-63385714D01*
+X137590476Y-63385714D01*
+X137685714Y-63433333D01*
+X137257142Y-64004761D02*
+X137352380Y-64052380D01*
+X137590476Y-64052380D01*
+X137685714Y-64004761D01*
+X137733333Y-63909523D01*
+X137733333Y-63814285D01*
+X137685714Y-63719047D01*
+X137590476Y-63671428D01*
+X137352380Y-63671428D01*
+X137257142Y-63623809D01*
+X136828571Y-64004761D02*
+X136733333Y-64052380D01*
+X136542857Y-64052380D01*
+X136447619Y-64004761D01*
+X136400000Y-63909523D01*
+X136400000Y-63861904D01*
+X136447619Y-63766666D01*
+X136542857Y-63719047D01*
+X136685714Y-63719047D01*
+X136780952Y-63671428D01*
+X136828571Y-63576190D01*
+X136828571Y-63528571D01*
+X136780952Y-63433333D01*
+X136685714Y-63385714D01*
+X136542857Y-63385714D01*
+X136447619Y-63433333D01*
+X135971428Y-63385714D02*
+X135971428Y-64385714D01*
+X135971428Y-63433333D02*
+X135876190Y-63385714D01*
+X135685714Y-63385714D01*
+X135590476Y-63433333D01*
+X135542857Y-63480952D01*
+X135495238Y-63576190D01*
+X135495238Y-63861904D01*
+X135542857Y-63957142D01*
+X135590476Y-64004761D01*
+X135685714Y-64052380D01*
+X135876190Y-64052380D01*
+X135971428Y-64004761D01*
+X135066666Y-64052380D02*
+X135066666Y-63385714D01*
+X135066666Y-63052380D02*
+X135114285Y-63100000D01*
+X135066666Y-63147619D01*
+X135019047Y-63100000D01*
+X135066666Y-63052380D01*
+X135066666Y-63147619D01*
+X134161904Y-63385714D02*
+X134161904Y-64052380D01*
+X134400000Y-63004761D02*
+X134638095Y-63719047D01*
+X134019047Y-63719047D01*
+X138947619Y-65702380D02*
+X138947619Y-64702380D01*
+X138566666Y-64702380D01*
+X138471428Y-64750000D01*
+X138423809Y-64797619D01*
+X138376190Y-64892857D01*
+X138376190Y-65035714D01*
+X138423809Y-65130952D01*
+X138471428Y-65178571D01*
+X138566666Y-65226190D01*
+X138947619Y-65226190D01*
+X137376190Y-65607142D02*
+X137423809Y-65654761D01*
+X137566666Y-65702380D01*
+X137661904Y-65702380D01*
+X137804761Y-65654761D01*
+X137900000Y-65559523D01*
+X137947619Y-65464285D01*
+X137995238Y-65273809D01*
+X137995238Y-65130952D01*
+X137947619Y-64940476D01*
+X137900000Y-64845238D01*
+X137804761Y-64750000D01*
+X137661904Y-64702380D01*
+X137566666Y-64702380D01*
+X137423809Y-64750000D01*
+X137376190Y-64797619D01*
+X136947619Y-65702380D02*
+X136947619Y-64702380D01*
+X136090476Y-65654761D02*
+X136185714Y-65702380D01*
+X136376190Y-65702380D01*
+X136471428Y-65654761D01*
+X136519047Y-65559523D01*
+X136519047Y-65178571D01*
+X136471428Y-65083333D01*
+X136376190Y-65035714D01*
+X136185714Y-65035714D01*
+X136090476Y-65083333D01*
+X136042857Y-65178571D01*
+X136042857Y-65273809D01*
+X136519047Y-65369047D01*
+X134995238Y-65035714D02*
+X134614285Y-65035714D01*
+X134852380Y-64702380D02*
+X134852380Y-65559523D01*
+X134804761Y-65654761D01*
+X134709523Y-65702380D01*
+X134614285Y-65702380D01*
+X134138095Y-65702380D02*
+X134233333Y-65654761D01*
+X134280952Y-65607142D01*
+X134328571Y-65511904D01*
+X134328571Y-65226190D01*
+X134280952Y-65130952D01*
+X134233333Y-65083333D01*
+X134138095Y-65035714D01*
+X133995238Y-65035714D01*
+X133900000Y-65083333D01*
+X133852380Y-65130952D01*
+X133804761Y-65226190D01*
+X133804761Y-65511904D01*
+X133852380Y-65607142D01*
+X133900000Y-65654761D01*
+X133995238Y-65702380D01*
+X134138095Y-65702380D01*
+X138138095Y-66352380D02*
+X138138095Y-67161904D01*
+X138090476Y-67257142D01*
+X138042857Y-67304761D01*
+X137947619Y-67352380D01*
+X137757142Y-67352380D01*
+X137661904Y-67304761D01*
+X137614285Y-67257142D01*
+X137566666Y-67161904D01*
+X137566666Y-66352380D01*
+X137138095Y-67304761D02*
+X136995238Y-67352380D01*
+X136757142Y-67352380D01*
+X136661904Y-67304761D01*
+X136614285Y-67257142D01*
+X136566666Y-67161904D01*
+X136566666Y-67066666D01*
+X136614285Y-66971428D01*
+X136661904Y-66923809D01*
+X136757142Y-66876190D01*
+X136947619Y-66828571D01*
+X137042857Y-66780952D01*
+X137090476Y-66733333D01*
+X137138095Y-66638095D01*
+X137138095Y-66542857D01*
+X137090476Y-66447619D01*
+X137042857Y-66400000D01*
+X136947619Y-66352380D01*
+X136709523Y-66352380D01*
+X136566666Y-66400000D01*
+X135804761Y-66828571D02*
+X135661904Y-66876190D01*
+X135614285Y-66923809D01*
+X135566666Y-67019047D01*
+X135566666Y-67161904D01*
+X135614285Y-67257142D01*
+X135661904Y-67304761D01*
+X135757142Y-67352380D01*
+X136138095Y-67352380D01*
+X136138095Y-66352380D01*
+X135804761Y-66352380D01*
+X135709523Y-66400000D01*
+X135661904Y-66447619D01*
+X135614285Y-66542857D01*
+X135614285Y-66638095D01*
+X135661904Y-66733333D01*
+X135709523Y-66780952D01*
+X135804761Y-66828571D01*
+X136138095Y-66828571D01*
+X135233333Y-66352380D02*
+X134614285Y-66352380D01*
+X134947619Y-66733333D01*
+X134804761Y-66733333D01*
+X134709523Y-66780952D01*
+X134661904Y-66828571D01*
+X134614285Y-66923809D01*
+X134614285Y-67161904D01*
+X134661904Y-67257142D01*
+X134709523Y-67304761D01*
+X134804761Y-67352380D01*
+X135090476Y-67352380D01*
+X135185714Y-67304761D01*
+X135233333Y-67257142D01*
+M02*

raspi4_pcie/gerber/raspi4_pcie-Edge_Cuts.gbr

@@ -0,0 +1,23 @@
+G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.1.2*
+G04 #@! TF.CreationDate,2019-07-11T07:54:25+02:00*
+G04 #@! TF.ProjectId,raspi4_pcie,72617370-6934-45f7-9063-69652e6b6963,rev?*
+G04 #@! TF.SameCoordinates,Original*
+G04 #@! TF.FileFunction,Profile,NP*
+%FSLAX46Y46*%
+G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
+G04 Created by KiCad (PCBNEW 5.1.2) date 2019-07-11 07:54:25*
+%MOMM*%
+%LPD*%
+G04 APERTURE LIST*
+%ADD10C,0.050000*%
+G04 APERTURE END LIST*
+D10*
+X132500000Y-69500000D02*
+X132500000Y-61500000D01*
+X140500000Y-69500000D02*
+X132500000Y-69500000D01*
+X140500000Y-61500000D02*
+X140500000Y-69500000D01*
+X132500000Y-61500000D02*
+X140500000Y-61500000D01*
+M02*

raspi4_pcie/gerber/raspi4_pcie-F_SilkS.gbr

@@ -0,0 +1,162 @@
+G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.1.2*
+G04 #@! TF.CreationDate,2019-07-11T07:54:25+02:00*
+G04 #@! TF.ProjectId,raspi4_pcie,72617370-6934-45f7-9063-69652e6b6963,rev?*
+G04 #@! TF.SameCoordinates,Original*
+G04 #@! TF.FileFunction,Legend,Top*
+G04 #@! TF.FilePolarity,Positive*
+%FSLAX46Y46*%
+G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
+G04 Created by KiCad (PCBNEW 5.1.2) date 2019-07-11 07:54:25*
+%MOMM*%
+%LPD*%
+G04 APERTURE LIST*
+%ADD10C,0.150000*%
+%ADD11C,0.120000*%
+G04 APERTURE END LIST*
+D10*
+X135076190Y-63202380D02*
+X135647619Y-63202380D01*
+X135361904Y-64202380D02*
+X135361904Y-63202380D01*
+X135980952Y-64202380D02*
+X135980952Y-63202380D01*
+X135980952Y-63678571D02*
+X136552380Y-63678571D01*
+X136552380Y-64202380D02*
+X136552380Y-63202380D01*
+X137028571Y-64202380D02*
+X137028571Y-63202380D01*
+X137457142Y-64154761D02*
+X137600000Y-64202380D01*
+X137838095Y-64202380D01*
+X137933333Y-64154761D01*
+X137980952Y-64107142D01*
+X138028571Y-64011904D01*
+X138028571Y-63916666D01*
+X137980952Y-63821428D01*
+X137933333Y-63773809D01*
+X137838095Y-63726190D01*
+X137647619Y-63678571D01*
+X137552380Y-63630952D01*
+X137504761Y-63583333D01*
+X137457142Y-63488095D01*
+X137457142Y-63392857D01*
+X137504761Y-63297619D01*
+X137552380Y-63250000D01*
+X137647619Y-63202380D01*
+X137885714Y-63202380D01*
+X138028571Y-63250000D01*
+X135123809Y-65804761D02*
+X135266666Y-65852380D01*
+X135504761Y-65852380D01*
+X135600000Y-65804761D01*
+X135647619Y-65757142D01*
+X135695238Y-65661904D01*
+X135695238Y-65566666D01*
+X135647619Y-65471428D01*
+X135600000Y-65423809D01*
+X135504761Y-65376190D01*
+X135314285Y-65328571D01*
+X135219047Y-65280952D01*
+X135171428Y-65233333D01*
+X135123809Y-65138095D01*
+X135123809Y-65042857D01*
+X135171428Y-64947619D01*
+X135219047Y-64900000D01*
+X135314285Y-64852380D01*
+X135552380Y-64852380D01*
+X135695238Y-64900000D01*
+X136123809Y-65852380D02*
+X136123809Y-64852380D01*
+X136600000Y-65852380D02*
+X136600000Y-64852380D01*
+X136838095Y-64852380D01*
+X136980952Y-64900000D01*
+X137076190Y-64995238D01*
+X137123809Y-65090476D01*
+X137171428Y-65280952D01*
+X137171428Y-65423809D01*
+X137123809Y-65614285D01*
+X137076190Y-65709523D01*
+X136980952Y-65804761D01*
+X136838095Y-65852380D01*
+X136600000Y-65852380D01*
+X137600000Y-65328571D02*
+X137933333Y-65328571D01*
+X138076190Y-65852380D02*
+X137600000Y-65852380D01*
+X137600000Y-64852380D01*
+X138076190Y-64852380D01*
+X134719047Y-67502380D02*
+X134719047Y-66502380D01*
+X134957142Y-66502380D01*
+X135100000Y-66550000D01*
+X135195238Y-66645238D01*
+X135242857Y-66740476D01*
+X135290476Y-66930952D01*
+X135290476Y-67073809D01*
+X135242857Y-67264285D01*
+X135195238Y-67359523D01*
+X135100000Y-67454761D01*
+X134957142Y-67502380D01*
+X134719047Y-67502380D01*
+X135909523Y-66502380D02*
+X136100000Y-66502380D01*
+X136195238Y-66550000D01*
+X136290476Y-66645238D01*
+X136338095Y-66835714D01*
+X136338095Y-67169047D01*
+X136290476Y-67359523D01*
+X136195238Y-67454761D01*
+X136100000Y-67502380D01*
+X135909523Y-67502380D01*
+X135814285Y-67454761D01*
+X135719047Y-67359523D01*
+X135671428Y-67169047D01*
+X135671428Y-66835714D01*
+X135719047Y-66645238D01*
+X135814285Y-66550000D01*
+X135909523Y-66502380D01*
+X136671428Y-66502380D02*
+X136909523Y-67502380D01*
+X137100000Y-66788095D01*
+X137290476Y-67502380D01*
+X137528571Y-66502380D01*
+X137909523Y-67502380D02*
+X137909523Y-66502380D01*
+X138480952Y-67502380D01*
+X138480952Y-66502380D01*
+D11*
+X132390000Y-69060000D02*
+X132390000Y-69610000D01*
+X140610000Y-61390000D02*
+X140060000Y-61390000D01*
+X140610000Y-61940000D02*
+X140610000Y-61390000D01*
+X140610000Y-69610000D02*
+X140060000Y-69610000D01*
+X140610000Y-69060000D02*
+X140610000Y-69610000D01*
+X132390000Y-61390000D02*
+X132940000Y-61390000D01*
+X132390000Y-61940000D02*
+X132390000Y-61390000D01*
+D10*
+X130652380Y-66261904D02*
+X131461904Y-66261904D01*
+X131557142Y-66214285D01*
+X131604761Y-66166666D01*
+X131652380Y-66071428D01*
+X131652380Y-65880952D01*
+X131604761Y-65785714D01*
+X131557142Y-65738095D01*
+X131461904Y-65690476D01*
+X130652380Y-65690476D01*
+X131652380Y-64690476D02*
+X131652380Y-65261904D01*
+X131652380Y-64976190D02*
+X130652380Y-64976190D01*
+X130795238Y-65071428D01*
+X130890476Y-65166666D01*
+X130938095Y-65261904D01*
+M02*

raspi4_pcie/gerber/raspi4_pcie-NPTH.drl

@@ -0,0 +1,13 @@
+M48
+; DRILL file {KiCad 5.1.2} date Thu 11 Jul 2019 07:54:27 AM CEST
+; FORMAT={-:-/ absolute / inch / decimal}
+; #@! TF.CreationDate,2019-07-11T07:54:27+02:00
+; #@! TF.GenerationSoftware,Kicad,Pcbnew,5.1.2
+; #@! TF.FileFunction,NonPlated,1,2,NPTH
+FMAT,2
+INCH
+%
+G90
+G05
+T0
+M30

raspi4_pcie/gerber/raspi4_pcie-PTH.drl

@@ -0,0 +1,19 @@
+M48
+; DRILL file {KiCad 5.1.2} date Thu 11 Jul 2019 07:54:27 AM CEST
+; FORMAT={-:-/ absolute / inch / decimal}
+; #@! TF.CreationDate,2019-07-11T07:54:27+02:00
+; #@! TF.GenerationSoftware,Kicad,Pcbnew,5.1.2
+; #@! TF.FileFunction,Plated,1,2,PTH
+FMAT,2
+INCH
+T1C0.0079
+%
+G90
+G05
+T1
+X5.2559Y-2.5467
+X5.2559Y-2.5635
+X5.4921Y-2.4995
+X5.4921Y-2.5163
+T0
+M30

raspi4_pcie/qfn_68.dcm

@@ -0,0 +1,3 @@
+EESchema-DOCLIB  Version 2.0
+#
+#End Doc Library

raspi4_pcie/qfn_68.lib

@@ -0,0 +1,164 @@
+EESchema-LIBRARY Version 2.4
+#encoding utf-8
+#
+# qfn_68
+#
+DEF qfn_68 U 0 40 Y Y 1 F N
+F0 "U" 0 0 50 H V C CNN
+F1 "qfn_68" 0 0 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+DRAW
+S -1050 1000 950 -1000 0 1 0 f
+X 1 1 -850 -1100 100 U 50 50 1 1 I
+X 10 10 50 -1100 100 U 50 50 1 1 I
+X 11 11 150 -1100 100 U 50 50 1 1 I
+X 12 12 250 -1100 100 U 50 50 1 1 I
+X 13 13 350 -1100 100 U 50 50 1 1 I
+X 14 14 450 -1100 100 U 50 50 1 1 I
+X 15 15 550 -1100 100 U 50 50 1 1 I
+X 16 16 650 -1100 100 U 50 50 1 1 I
+X 17 17 750 -1100 100 U 50 50 1 1 I
+X 18 18 1050 -800 100 L 50 50 1 1 I
+X 19 19 1050 -700 100 L 50 50 1 1 I
+X 2 2 -750 -1100 100 U 50 50 1 1 I
+X 20 20 1050 -600 100 L 50 50 1 1 I
+X 21 21 1050 -500 100 L 50 50 1 1 I
+X 22 22 1050 -400 100 L 50 50 1 1 I
+X 23 23 1050 -300 100 L 50 50 1 1 I
+X 24 24 1050 -200 100 L 50 50 1 1 I
+X 25 25 1050 -100 100 L 50 50 1 1 I
+X 26 26 1050 0 100 L 50 50 1 1 I
+X 27 27 1050 100 100 L 50 50 1 1 I
+X 28 28 1050 200 100 L 50 50 1 1 I
+X 29 29 1050 300 100 L 50 50 1 1 I
+X 3 3 -650 -1100 100 U 50 50 1 1 I
+X 30 30 1050 400 100 L 50 50 1 1 I
+X 31 31 1050 500 100 L 50 50 1 1 I
+X 32 32 1050 600 100 L 50 50 1 1 I
+X 33 33 1050 700 100 L 50 50 1 1 I
+X 34 34 1050 800 100 L 50 50 1 1 I
+X 35 35 800 1100 100 D 50 50 1 1 I
+X 36 36 700 1100 100 D 50 50 1 1 I
+X 37 37 600 1100 100 D 50 50 1 1 I
+X 38 38 500 1100 100 D 50 50 1 1 I
+X 39 39 400 1100 100 D 50 50 1 1 I
+X 4 4 -550 -1100 100 U 50 50 1 1 I
+X 40 40 300 1100 100 D 50 50 1 1 I
+X 41 41 200 1100 100 D 50 50 1 1 I
+X 42 42 100 1100 100 D 50 50 1 1 I
+X 43 43 0 1100 100 D 50 50 1 1 I
+X 44 44 -100 1100 100 D 50 50 1 1 I
+X 45 45 -200 1100 100 D 50 50 1 1 I
+X 46 46 -300 1100 100 D 50 50 1 1 I
+X 47 47 -400 1100 100 D 50 50 1 1 I
+X 48 48 -500 1100 100 D 50 50 1 1 I
+X 49 49 -600 1100 100 D 50 50 1 1 I
+X 5 5 -450 -1100 100 U 50 50 1 1 I
+X 50 50 -700 1100 100 D 50 50 1 1 I
+X 51 51 -800 1100 100 D 50 50 1 1 I
+X 52 52 -1150 800 100 R 50 50 1 1 I
+X 53 53 -1150 700 100 R 50 50 1 1 I
+X 54 54 -1150 600 100 R 50 50 1 1 I
+X 55 55 -1150 500 100 R 50 50 1 1 I
+X 56 56 -1150 400 100 R 50 50 1 1 I
+X 57 57 -1150 300 100 R 50 50 1 1 I
+X 58 58 -1150 200 100 R 50 50 1 1 I
+X 59 59 -1150 100 100 R 50 50 1 1 I
+X 6 6 -350 -1100 100 U 50 50 1 1 I
+X 60 60 -1150 0 100 R 50 50 1 1 I
+X 61 61 -1150 -100 100 R 50 50 1 1 I
+X 62 62 -1150 -200 100 R 50 50 1 1 I
+X 63 63 -1150 -300 100 R 50 50 1 1 I
+X 64 64 -1150 -400 100 R 50 50 1 1 I
+X 65 65 -1150 -500 100 R 50 50 1 1 I
+X 66 66 -1150 -600 100 R 50 50 1 1 I
+X 67 67 -1150 -700 100 R 50 50 1 1 I
+X 68 68 -1150 -800 100 R 50 50 1 1 I
+X 7 7 -250 -1100 100 U 50 50 1 1 I
+X 8 8 -150 -1100 100 U 50 50 1 1 I
+X 9 9 -50 -1100 100 U 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+# qfn_68_flipped
+#
+DEF qfn_68_flipped U 0 40 Y Y 1 F N
+F0 "U" 0 0 50 H V C CNN
+F1 "qfn_68_flipped" 0 0 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+DRAW
+S -1050 1000 950 -1000 0 1 0 f
+X 1 1 800 -1100 100 U 50 50 1 1 I
+X 10 10 -100 -1100 100 U 50 50 1 1 I
+X 11 11 -200 -1100 100 U 50 50 1 1 I
+X 12 12 -300 -1100 100 U 50 50 1 1 I
+X 13 13 -400 -1100 100 U 50 50 1 1 I
+X 14 14 -500 -1100 100 U 50 50 1 1 I
+X 15 15 -600 -1100 100 U 50 50 1 1 I
+X 16 16 -700 -1100 100 U 50 50 1 1 I
+X 17 17 -800 -1100 100 U 50 50 1 1 I
+X 18 18 -1150 -800 100 R 50 50 1 1 I
+X 19 19 -1150 -700 100 R 50 50 1 1 I
+X 2 2 700 -1100 100 U 50 50 1 1 I
+X 20 20 -1150 -600 100 R 50 50 1 1 I
+X 21 21 -1150 -500 100 R 50 50 1 1 I
+X 22 22 -1150 -400 100 R 50 50 1 1 I
+X 23 23 -1150 -300 100 R 50 50 1 1 I
+X 24 24 -1150 -200 100 R 50 50 1 1 I
+X 25 25 -1150 -100 100 R 50 50 1 1 I
+X 26 26 -1150 0 100 R 50 50 1 1 I
+X 27 27 -1150 100 100 R 50 50 1 1 I
+X 28 28 -1150 200 100 R 50 50 1 1 I
+X 29 29 -1150 300 100 R 50 50 1 1 I
+X 3 3 600 -1100 100 U 50 50 1 1 I
+X 30 30 -1150 400 100 R 50 50 1 1 I
+X 31 31 -1150 500 100 R 50 50 1 1 I
+X 32 32 -1150 600 100 R 50 50 1 1 I
+X 33 33 -1150 700 100 R 50 50 1 1 I
+X 34 34 -1150 800 100 R 50 50 1 1 I
+X 35 35 -800 1100 100 D 50 50 1 1 I
+X 36 36 -700 1100 100 D 50 50 1 1 I
+X 37 37 -600 1100 100 D 50 50 1 1 I
+X 38 38 -500 1100 100 D 50 50 1 1 I
+X 39 39 -400 1100 100 D 50 50 1 1 I
+X 4 4 500 -1100 100 U 50 50 1 1 I
+X 40 40 -300 1100 100 D 50 50 1 1 I
+X 41 41 -200 1100 100 D 50 50 1 1 I
+X 42 42 -100 1100 100 D 50 50 1 1 I
+X 43 43 0 1100 100 D 50 50 1 1 I
+X 44 44 100 1100 100 D 50 50 1 1 I
+X 45 45 200 1100 100 D 50 50 1 1 I
+X 46 46 300 1100 100 D 50 50 1 1 I
+X 47 47 400 1100 100 D 50 50 1 1 I
+X 48 48 500 1100 100 D 50 50 1 1 I
+X 49 49 600 1100 100 D 50 50 1 1 I
+X 5 5 400 -1100 100 U 50 50 1 1 I
+X 50 50 700 1100 100 D 50 50 1 1 I
+X 51 51 800 1100 100 D 50 50 1 1 I
+X 52 52 1050 800 100 L 50 50 1 1 I
+X 53 53 1050 700 100 L 50 50 1 1 I
+X 54 54 1050 600 100 L 50 50 1 1 I
+X 55 55 1050 500 100 L 50 50 1 1 I
+X 56 56 1050 400 100 L 50 50 1 1 I
+X 57 57 1050 300 100 L 50 50 1 1 I
+X 58 58 1050 200 100 L 50 50 1 1 I
+X 59 59 1050 100 100 L 50 50 1 1 I
+X 6 6 300 -1100 100 U 50 50 1 1 I
+X 60 60 1050 0 100 L 50 50 1 1 I
+X 61 61 1050 -100 100 L 50 50 1 1 I
+X 62 62 1050 -200 100 L 50 50 1 1 I
+X 63 63 1050 -300 100 L 50 50 1 1 I
+X 64 64 1050 -400 100 L 50 50 1 1 I
+X 65 65 1050 -500 100 L 50 50 1 1 I
+X 66 66 1050 -600 100 L 50 50 1 1 I
+X 67 67 1050 -700 100 L 50 50 1 1 I
+X 68 68 1050 -800 100 L 50 50 1 1 I
+X 7 7 200 -1100 100 U 50 50 1 1 I
+X 8 8 100 -1100 100 U 50 50 1 1 I
+X 9 9 0 -1100 100 U 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+#End Library

raspi4_pcie/raspi4_pcie-cache.lib

@@ -0,0 +1,84 @@
+EESchema-LIBRARY Version 2.4
+#encoding utf-8
+#
+# qfn_68_qfn_68_flipped
+#
+DEF qfn_68_qfn_68_flipped U 0 40 Y Y 1 F N
+F0 "U" 0 0 50 H V C CNN
+F1 "qfn_68_qfn_68_flipped" 0 0 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+DRAW
+S -1050 1000 950 -1000 0 1 0 f
+X 1 1 800 -1100 100 U 50 50 1 1 I
+X 10 10 -100 -1100 100 U 50 50 1 1 I
+X 11 11 -200 -1100 100 U 50 50 1 1 I
+X 12 12 -300 -1100 100 U 50 50 1 1 I
+X 13 13 -400 -1100 100 U 50 50 1 1 I
+X 14 14 -500 -1100 100 U 50 50 1 1 I
+X 15 15 -600 -1100 100 U 50 50 1 1 I
+X 16 16 -700 -1100 100 U 50 50 1 1 I
+X 17 17 -800 -1100 100 U 50 50 1 1 I
+X 18 18 -1150 -800 100 R 50 50 1 1 I
+X 19 19 -1150 -700 100 R 50 50 1 1 I
+X 2 2 700 -1100 100 U 50 50 1 1 I
+X 20 20 -1150 -600 100 R 50 50 1 1 I
+X 21 21 -1150 -500 100 R 50 50 1 1 I
+X 22 22 -1150 -400 100 R 50 50 1 1 I
+X 23 23 -1150 -300 100 R 50 50 1 1 I
+X 24 24 -1150 -200 100 R 50 50 1 1 I
+X 25 25 -1150 -100 100 R 50 50 1 1 I
+X 26 26 -1150 0 100 R 50 50 1 1 I
+X 27 27 -1150 100 100 R 50 50 1 1 I
+X 28 28 -1150 200 100 R 50 50 1 1 I
+X 29 29 -1150 300 100 R 50 50 1 1 I
+X 3 3 600 -1100 100 U 50 50 1 1 I
+X 30 30 -1150 400 100 R 50 50 1 1 I
+X 31 31 -1150 500 100 R 50 50 1 1 I
+X 32 32 -1150 600 100 R 50 50 1 1 I
+X 33 33 -1150 700 100 R 50 50 1 1 I
+X 34 34 -1150 800 100 R 50 50 1 1 I
+X 35 35 -800 1100 100 D 50 50 1 1 I
+X 36 36 -700 1100 100 D 50 50 1 1 I
+X 37 37 -600 1100 100 D 50 50 1 1 I
+X 38 38 -500 1100 100 D 50 50 1 1 I
+X 39 39 -400 1100 100 D 50 50 1 1 I
+X 4 4 500 -1100 100 U 50 50 1 1 I
+X 40 40 -300 1100 100 D 50 50 1 1 I
+X 41 41 -200 1100 100 D 50 50 1 1 I
+X 42 42 -100 1100 100 D 50 50 1 1 I
+X 43 43 0 1100 100 D 50 50 1 1 I
+X 44 44 100 1100 100 D 50 50 1 1 I
+X 45 45 200 1100 100 D 50 50 1 1 I
+X 46 46 300 1100 100 D 50 50 1 1 I
+X 47 47 400 1100 100 D 50 50 1 1 I
+X 48 48 500 1100 100 D 50 50 1 1 I
+X 49 49 600 1100 100 D 50 50 1 1 I
+X 5 5 400 -1100 100 U 50 50 1 1 I
+X 50 50 700 1100 100 D 50 50 1 1 I
+X 51 51 800 1100 100 D 50 50 1 1 I
+X 52 52 1050 800 100 L 50 50 1 1 I
+X 53 53 1050 700 100 L 50 50 1 1 I
+X 54 54 1050 600 100 L 50 50 1 1 I
+X 55 55 1050 500 100 L 50 50 1 1 I
+X 56 56 1050 400 100 L 50 50 1 1 I
+X 57 57 1050 300 100 L 50 50 1 1 I
+X 58 58 1050 200 100 L 50 50 1 1 I
+X 59 59 1050 100 100 L 50 50 1 1 I
+X 6 6 300 -1100 100 U 50 50 1 1 I
+X 60 60 1050 0 100 L 50 50 1 1 I
+X 61 61 1050 -100 100 L 50 50 1 1 I
+X 62 62 1050 -200 100 L 50 50 1 1 I
+X 63 63 1050 -300 100 L 50 50 1 1 I
+X 64 64 1050 -400 100 L 50 50 1 1 I
+X 65 65 1050 -500 100 L 50 50 1 1 I
+X 66 66 1050 -600 100 L 50 50 1 1 I
+X 67 67 1050 -700 100 L 50 50 1 1 I
+X 68 68 1050 -800 100 L 50 50 1 1 I
+X 7 7 200 -1100 100 U 50 50 1 1 I
+X 8 8 100 -1100 100 U 50 50 1 1 I
+X 9 9 0 -1100 100 U 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+#End Library

raspi4_pcie/raspi4_pcie.bak

@@ -0,0 +1,111 @@
+EESchema Schematic File Version 4
+EELAYER 29 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+Text Label 3050 2250 2    50   ~ 0
+SSTX_P
+Text Label 3050 2350 2    50   ~ 0
+SSTX_N
+Text Label 3050 2550 2    50   ~ 0
+SSRX_P
+Text Label 3050 2650 2    50   ~ 0
+SSRX_N
+Text Label 3050 2850 2    50   ~ 0
+USB2_P
+Text Label 3050 2950 2    50   ~ 0
+USB2_N
+Wire Wire Line
+	3050 2250 3250 2250
+Wire Wire Line
+	3050 2350 3250 2350
+Wire Wire Line
+	3050 2550 3250 2550
+Wire Wire Line
+	3050 2650 3250 2650
+Wire Wire Line
+	3050 2850 3250 2850
+Wire Wire Line
+	3050 2950 3250 2950
+Text Label 5650 2850 0    50   ~ 0
+HSO0_P
+Text Label 5650 2950 0    50   ~ 0
+HSO0_N
+Text Label 5650 3150 0    50   ~ 0
+HSI0_P
+Text Label 5650 3250 0    50   ~ 0
+HSI0_N
+Text Label 5650 3450 0    50   ~ 0
+REFCLK_P
+Text Label 5650 3550 0    50   ~ 0
+REFCLK_N
+Wire Wire Line
+	5450 2850 5650 2850
+Wire Wire Line
+	5450 2950 5650 2950
+Wire Wire Line
+	5450 3150 5650 3150
+Wire Wire Line
+	5450 3250 5650 3250
+Wire Wire Line
+	5450 3450 5650 3450
+Wire Wire Line
+	5450 3550 5650 3550
+Text Label 3950 4950 2    50   ~ 0
+SSTX_P
+Text Label 3950 5050 2    50   ~ 0
+SSTX_N
+Text Label 3950 5250 2    50   ~ 0
+SSRX_P
+Text Label 3950 5350 2    50   ~ 0
+SSRX_N
+Text Label 3950 5550 2    50   ~ 0
+USB2_P
+Text Label 3950 5650 2    50   ~ 0
+USB2_N
+Text Label 4400 4950 0    50   ~ 0
+HSI0_P
+Text Label 4400 5050 0    50   ~ 0
+HSI0_N
+Text Label 4400 5550 0    50   ~ 0
+REFCLK_P
+Text Label 4400 5650 0    50   ~ 0
+REFCLK_N
+Text Label 4400 5350 0    50   ~ 0
+HSO0_N
+Text Label 4400 5250 0    50   ~ 0
+HSO0_P
+Wire Wire Line
+	3950 4950 4400 4950
+Wire Wire Line
+	3950 5050 4400 5050
+Wire Wire Line
+	3950 5250 4400 5250
+Wire Wire Line
+	3950 5350 4400 5350
+Wire Wire Line
+	3950 5550 4400 5550
+Wire Wire Line
+	3950 5650 4400 5650
+$Comp
+L qfn_68:qfn_68_flipped U?
+U 1 1 5D284145
+P 4400 3050
+F 0 "U?" H 4950 1700 50  0000 L CNN
+F 1 "qfn_68_flipped" H 4950 1800 50  0000 L CNN
+F 2 "" H 4400 3050 50  0001 C CNN
+F 3 "" H 4400 3050 50  0001 C CNN
+	1    4400 3050
+	1    0    0    -1  
+$EndComp
+$EndSCHEMATC

raspi4_pcie/raspi4_pcie.kicad_pcb

@@ -0,0 +1,348 @@
+(kicad_pcb (version 20171130) (host pcbnew 5.1.2)
+
+  (general
+    (thickness 1.6)
+    (drawings 6)
+    (tracks 54)
+    (zones 0)
+    (modules 1)
+    (nets 7)
+  )
+
+  (page A4)
+  (layers
+    (0 F.Cu signal)
+    (31 B.Cu signal)
+    (32 B.Adhes user)
+    (33 F.Adhes user)
+    (34 B.Paste user)
+    (35 F.Paste user)
+    (36 B.SilkS user)
+    (37 F.SilkS user)
+    (38 B.Mask user)
+    (39 F.Mask user)
+    (40 Dwgs.User user)
+    (41 Cmts.User user)
+    (42 Eco1.User user)
+    (43 Eco2.User user)
+    (44 Edge.Cuts user)
+    (45 Margin user)
+    (46 B.CrtYd user)
+    (47 F.CrtYd user)
+    (48 B.Fab user)
+    (49 F.Fab user)
+  )
+
+  (setup
+    (last_trace_width 0.1016)
+    (trace_clearance 0.127)
+    (zone_clearance 0.508)
+    (zone_45_only no)
+    (trace_min 0.1016)
+    (via_size 0.3)
+    (via_drill 0.2)
+    (via_min_size 0.2)
+    (via_min_drill 0.2)
+    (uvia_size 0.3)
+    (uvia_drill 0.1)
+    (uvias_allowed no)
+    (uvia_min_size 0.2)
+    (uvia_min_drill 0.1)
+    (edge_width 0.05)
+    (segment_width 0.2)
+    (pcb_text_width 0.3)
+    (pcb_text_size 1.5 1.5)
+    (mod_edge_width 0.12)
+    (mod_text_size 1 1)
+    (mod_text_width 0.15)
+    (pad_size 1.524 1.524)
+    (pad_drill 0.762)
+    (pad_to_mask_clearance 0.051)
+    (solder_mask_min_width 0.25)
+    (aux_axis_origin 0 0)
+    (visible_elements FFFFFF7F)
+    (pcbplotparams
+      (layerselection 0x010f0_ffffffff)
+      (usegerberextensions false)
+      (usegerberattributes false)
+      (usegerberadvancedattributes false)
+      (creategerberjobfile false)
+      (excludeedgelayer true)
+      (linewidth 0.100000)
+      (plotframeref false)
+      (viasonmask false)
+      (mode 1)
+      (useauxorigin false)
+      (hpglpennumber 1)
+      (hpglpenspeed 20)
+      (hpglpendiameter 15.000000)
+      (psnegative false)
+      (psa4output false)
+      (plotreference true)
+      (plotvalue true)
+      (plotinvisibletext false)
+      (padsonsilk false)
+      (subtractmaskfromsilk false)
+      (outputformat 1)
+      (mirror false)
+      (drillshape 0)
+      (scaleselection 1)
+      (outputdirectory "gerber"))
+  )
+
+  (net 0 "")
+  (net 1 /REFCLK_N)
+  (net 2 /REFCLK_P)
+  (net 3 /HSO0_N)
+  (net 4 /HSO0_P)
+  (net 5 /HSI0_N)
+  (net 6 /HSI0_P)
+
+  (net_class Default "This is the default net class."
+    (clearance 0.127)
+    (trace_width 0.1016)
+    (via_dia 0.3)
+    (via_drill 0.2)
+    (uvia_dia 0.3)
+    (uvia_drill 0.1)
+    (add_net /HSI0_N)
+    (add_net /HSI0_P)
+    (add_net /HSO0_N)
+    (add_net /HSO0_P)
+    (add_net /REFCLK_N)
+    (add_net /REFCLK_P)
+    (add_net "Net-(U1-Pad1)")
+    (add_net "Net-(U1-Pad10)")
+    (add_net "Net-(U1-Pad11)")
+    (add_net "Net-(U1-Pad12)")
+    (add_net "Net-(U1-Pad13)")
+    (add_net "Net-(U1-Pad14)")
+    (add_net "Net-(U1-Pad15)")
+    (add_net "Net-(U1-Pad16)")
+    (add_net "Net-(U1-Pad17)")
+    (add_net "Net-(U1-Pad18)")
+    (add_net "Net-(U1-Pad19)")
+    (add_net "Net-(U1-Pad2)")
+    (add_net "Net-(U1-Pad20)")
+    (add_net "Net-(U1-Pad21)")
+    (add_net "Net-(U1-Pad22)")
+    (add_net "Net-(U1-Pad23)")
+    (add_net "Net-(U1-Pad24)")
+    (add_net "Net-(U1-Pad25)")
+    (add_net "Net-(U1-Pad26)")
+    (add_net "Net-(U1-Pad29)")
+    (add_net "Net-(U1-Pad3)")
+    (add_net "Net-(U1-Pad32)")
+    (add_net "Net-(U1-Pad35)")
+    (add_net "Net-(U1-Pad36)")
+    (add_net "Net-(U1-Pad37)")
+    (add_net "Net-(U1-Pad38)")
+    (add_net "Net-(U1-Pad39)")
+    (add_net "Net-(U1-Pad4)")
+    (add_net "Net-(U1-Pad40)")
+    (add_net "Net-(U1-Pad41)")
+    (add_net "Net-(U1-Pad42)")
+    (add_net "Net-(U1-Pad43)")
+    (add_net "Net-(U1-Pad44)")
+    (add_net "Net-(U1-Pad45)")
+    (add_net "Net-(U1-Pad46)")
+    (add_net "Net-(U1-Pad47)")
+    (add_net "Net-(U1-Pad48)")
+    (add_net "Net-(U1-Pad49)")
+    (add_net "Net-(U1-Pad5)")
+    (add_net "Net-(U1-Pad50)")
+    (add_net "Net-(U1-Pad51)")
+    (add_net "Net-(U1-Pad52)")
+    (add_net "Net-(U1-Pad53)")
+    (add_net "Net-(U1-Pad54)")
+    (add_net "Net-(U1-Pad55)")
+    (add_net "Net-(U1-Pad56)")
+    (add_net "Net-(U1-Pad57)")
+    (add_net "Net-(U1-Pad6)")
+    (add_net "Net-(U1-Pad60)")
+    (add_net "Net-(U1-Pad63)")
+    (add_net "Net-(U1-Pad66)")
+    (add_net "Net-(U1-Pad67)")
+    (add_net "Net-(U1-Pad68)")
+    (add_net "Net-(U1-Pad7)")
+    (add_net "Net-(U1-Pad8)")
+    (add_net "Net-(U1-Pad9)")
+  )
+
+  (module raspi4_pcie:QFN-68_hack (layer F.Cu) (tedit 5D26C3F8) (tstamp 5D2741D3)
+    (at 136.5 65.5 90)
+    (descr "QFN, 68 Pin (https://cdn.microsemi.com/documents/1bf6886f-5919-4508-a50b-b1dbf3fdf0f4/download/#page=98), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py")
+    (tags "QFN DFN_QFN")
+    (path /5D284145)
+    (attr smd)
+    (fp_text reference U1 (at 0 -5.3 90) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value qfn_68_flipped (at 0 5.3 90) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start 4.6 -4.6) (end -4.6 -4.6) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 4.6 4.6) (end 4.6 -4.6) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -4.6 4.6) (end 4.6 4.6) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -4.6 -4.6) (end -4.6 4.6) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -4 -3) (end -3 -4) (layer F.Fab) (width 0.1))
+    (fp_line (start -4 4) (end -4 -3) (layer F.Fab) (width 0.1))
+    (fp_line (start 4 4) (end -4 4) (layer F.Fab) (width 0.1))
+    (fp_line (start 4 -4) (end 4 4) (layer F.Fab) (width 0.1))
+    (fp_line (start -3 -4) (end 4 -4) (layer F.Fab) (width 0.1))
+    (fp_line (start -3.56 -4.11) (end -4.11 -4.11) (layer F.SilkS) (width 0.12))
+    (fp_line (start 4.11 4.11) (end 4.11 3.56) (layer F.SilkS) (width 0.12))
+    (fp_line (start 3.56 4.11) (end 4.11 4.11) (layer F.SilkS) (width 0.12))
+    (fp_line (start -4.11 4.11) (end -4.11 3.56) (layer F.SilkS) (width 0.12))
+    (fp_line (start -3.56 4.11) (end -4.11 4.11) (layer F.SilkS) (width 0.12))
+    (fp_line (start 4.11 -4.11) (end 4.11 -3.56) (layer F.SilkS) (width 0.12))
+    (fp_line (start 3.56 -4.11) (end 4.11 -4.11) (layer F.SilkS) (width 0.12))
+    (pad 68 smd roundrect (at -3.2 -3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 67 smd roundrect (at -2.8 -3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 66 smd roundrect (at -2.4 -3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 65 smd roundrect (at -2 -3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 1 /REFCLK_N))
+    (pad 64 smd roundrect (at -1.6 -3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 2 /REFCLK_P))
+    (pad 63 smd roundrect (at -1.2 -3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 62 smd roundrect (at -0.8 -3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 5 /HSI0_N))
+    (pad 61 smd roundrect (at -0.4 -3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 6 /HSI0_P))
+    (pad 60 smd roundrect (at 0 -3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 59 smd roundrect (at 0.4 -3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 3 /HSO0_N))
+    (pad 58 smd roundrect (at 0.8 -3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 4 /HSO0_P))
+    (pad 57 smd roundrect (at 1.2 -3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 56 smd roundrect (at 1.6 -3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 55 smd roundrect (at 2 -3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 54 smd roundrect (at 2.4 -3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 53 smd roundrect (at 2.8 -3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 52 smd roundrect (at 3.2 -3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 51 smd roundrect (at 3.9375 -3.2 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 50 smd roundrect (at 3.9375 -2.8 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 49 smd roundrect (at 3.9375 -2.4 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 48 smd roundrect (at 3.9375 -2 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 47 smd roundrect (at 3.9375 -1.6 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 46 smd roundrect (at 3.9375 -1.2 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 45 smd roundrect (at 3.9375 -0.8 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 44 smd roundrect (at 3.9375 -0.4 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 43 smd roundrect (at 3.9375 0 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 42 smd roundrect (at 3.9375 0.4 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 41 smd roundrect (at 3.9375 0.8 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 40 smd roundrect (at 3.9375 1.2 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 39 smd roundrect (at 3.9375 1.6 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 38 smd roundrect (at 3.9375 2 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 37 smd roundrect (at 3.9375 2.4 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 36 smd roundrect (at 3.9375 2.8 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 35 smd roundrect (at 3.9375 3.2 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 34 smd roundrect (at 3.2 3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 6 /HSI0_P))
+    (pad 33 smd roundrect (at 2.8 3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 5 /HSI0_N))
+    (pad 32 smd roundrect (at 2.4 3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 31 smd roundrect (at 2 3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 4 /HSO0_P))
+    (pad 30 smd roundrect (at 1.6 3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 3 /HSO0_N))
+    (pad 29 smd roundrect (at 1.2 3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 28 smd roundrect (at 0.8 3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 2 /REFCLK_P))
+    (pad 27 smd roundrect (at 0.4 3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 1 /REFCLK_N))
+    (pad 26 smd roundrect (at 0 3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 25 smd roundrect (at -0.4 3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 24 smd roundrect (at -0.8 3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 23 smd roundrect (at -1.2 3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 22 smd roundrect (at -1.6 3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 21 smd roundrect (at -2 3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 20 smd roundrect (at -2.4 3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 19 smd roundrect (at -2.8 3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 18 smd roundrect (at -3.2 3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 17 smd roundrect (at -3.9375 3.2 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 16 smd roundrect (at -3.9375 2.8 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 15 smd roundrect (at -3.9375 2.4 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 14 smd roundrect (at -3.9375 2 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 13 smd roundrect (at -3.9375 1.6 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 12 smd roundrect (at -3.9375 1.2 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 11 smd roundrect (at -3.9375 0.8 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 10 smd roundrect (at -3.9375 0.4 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 9 smd roundrect (at -3.9375 0 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 8 smd roundrect (at -3.9375 -0.4 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 7 smd roundrect (at -3.9375 -0.8 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 6 smd roundrect (at -3.9375 -1.2 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 5 smd roundrect (at -3.9375 -1.6 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 4 smd roundrect (at -3.9375 -2 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 3 smd roundrect (at -3.9375 -2.4 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 2 smd roundrect (at -3.9375 -2.8 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 1 smd roundrect (at -3.9375 -3.2 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  )
+
+  (gr_text "Raspi4\nPCIe to\nUSB3" (at 136.4 65.25) (layer B.SilkS)
+    (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+  )
+  (gr_text "THIS\nSIDE\nDOWN" (at 136.6 65.4) (layer F.SilkS)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (gr_line (start 132.5 69.5) (end 132.5 61.5) (layer Edge.Cuts) (width 0.05) (tstamp 5D272693))
+  (gr_line (start 140.5 69.5) (end 132.5 69.5) (layer Edge.Cuts) (width 0.05))
+  (gr_line (start 140.5 61.5) (end 140.5 69.5) (layer Edge.Cuts) (width 0.05))
+  (gr_line (start 132.5 61.5) (end 140.5 61.5) (layer Edge.Cuts) (width 0.05))
+
+  (segment (start 136.25 67.5) (end 136.297566 67.5) (width 0.1524) (layer F.Cu) (net 1))
+  (segment (start 132.6228 67.5) (end 136.25 67.5) (width 0.1524) (layer F.Cu) (net 1))
+  (segment (start 136.297566 67.5) (end 136.473783 67.323783) (width 0.1524) (layer F.Cu) (net 1))
+  (segment (start 136.357866 67.4397) (end 136.473783 67.323783) (width 0.1524) (layer F.Cu) (net 1))
+  (segment (start 138.697566 65.1) (end 138.523783 65.273783) (width 0.1524) (layer F.Cu) (net 1))
+  (segment (start 139.15 65.1) (end 138.697566 65.1) (width 0.1524) (layer F.Cu) (net 1))
+  (segment (start 136.473783 67.323783) (end 138.523783 65.273783) (width 0.1524) (layer F.Cu) (net 1))
+  (segment (start 138.757866 65.1) (end 139.15 65.1) (width 0.1524) (layer F.Cu) (net 1))
+  (segment (start 139.15 65.1) (end 140.3772 65.1) (width 0.1524) (layer F.Cu) (net 1))
+  (segment (start 136.15 67.1) (end 136.302434 67.1) (width 0.1524) (layer F.Cu) (net 2))
+  (segment (start 132.6228 67.1) (end 136.15 67.1) (width 0.1524) (layer F.Cu) (net 2))
+  (segment (start 136.302434 67.1) (end 136.476217 66.926217) (width 0.1524) (layer F.Cu) (net 2))
+  (segment (start 136.15 67.1) (end 136.242134 67.1) (width 0.1524) (layer F.Cu) (net 2))
+  (segment (start 138.95 64.7) (end 138.702434 64.7) (width 0.1524) (layer F.Cu) (net 2))
+  (segment (start 138.702434 64.7) (end 138.476217 64.926217) (width 0.1524) (layer F.Cu) (net 2))
+  (segment (start 138.95 64.7) (end 140.3772 64.7) (width 0.1524) (layer F.Cu) (net 2))
+  (segment (start 136.476217 66.926217) (end 138.476217 64.926217) (width 0.1524) (layer F.Cu) (net 2))
+  (segment (start 138.476217 64.926217) (end 138.642134 64.7603) (width 0.1524) (layer F.Cu) (net 2))
+  (segment (start 133.5 65.1135) (end 133.5738 65.0397) (width 0.1524) (layer B.Cu) (net 3))
+  (segment (start 133.5738 65.0397) (end 133.857866 65.0397) (width 0.1524) (layer B.Cu) (net 3))
+  (segment (start 133.857866 65.0397) (end 135.057866 63.8397) (width 0.1524) (layer B.Cu) (net 3))
+  (via (at 133.5 65.1135) (size 0.3) (drill 0.2) (layers F.Cu B.Cu) (net 3))
+  (segment (start 132.6228 65.1) (end 133.4262 65.1) (width 0.1524) (layer F.Cu) (net 3))
+  (segment (start 139.4262 63.8397) (end 135.057866 63.8397) (width 0.1524) (layer B.Cu) (net 3))
+  (segment (start 139.5 63.9135) (end 139.4262 63.8397) (width 0.1524) (layer B.Cu) (net 3))
+  (via (at 139.5 63.9135) (size 0.3) (drill 0.2) (layers F.Cu B.Cu) (net 3))
+  (segment (start 140.3772 63.9) (end 139.5738 63.9) (width 0.1524) (layer F.Cu) (net 3))
+  (via (at 139.5 63.4865) (size 0.3) (drill 0.2) (layers F.Cu B.Cu) (net 4))
+  (segment (start 133.5 64.6865) (end 133.5738 64.7603) (width 0.1524) (layer B.Cu) (net 4))
+  (segment (start 133.742134 64.7603) (end 134.942134 63.5603) (width 0.1524) (layer B.Cu) (net 4))
+  (segment (start 133.5738 64.7603) (end 133.742134 64.7603) (width 0.1524) (layer B.Cu) (net 4))
+  (segment (start 132.6228 64.7) (end 133.4262 64.7) (width 0.1524) (layer F.Cu) (net 4))
+  (via (at 133.5 64.6865) (size 0.3) (drill 0.2) (layers F.Cu B.Cu) (net 4))
+  (segment (start 139.4262 63.5603) (end 134.942134 63.5603) (width 0.1524) (layer B.Cu) (net 4))
+  (segment (start 139.5 63.4865) (end 139.4262 63.5603) (width 0.1524) (layer B.Cu) (net 4))
+  (segment (start 140.3772 63.5) (end 139.5738 63.5) (width 0.1524) (layer F.Cu) (net 4))
+  (segment (start 134.85 66.3) (end 132.6228 66.3) (width 0.1524) (layer F.Cu) (net 5))
+  (segment (start 134.85 66.3) (end 134.897566 66.3) (width 0.1524) (layer F.Cu) (net 5))
+  (segment (start 138.497566 62.7) (end 138.398783 62.798783) (width 0.1524) (layer F.Cu) (net 5))
+  (segment (start 138.85 62.7) (end 138.497566 62.7) (width 0.1524) (layer F.Cu) (net 5))
+  (segment (start 138.557866 62.7) (end 138.85 62.7) (width 0.1524) (layer F.Cu) (net 5))
+  (segment (start 134.897566 66.3) (end 138.398783 62.798783) (width 0.1524) (layer F.Cu) (net 5))
+  (segment (start 138.85 62.7) (end 140.3772 62.7) (width 0.1524) (layer F.Cu) (net 5))
+  (segment (start 134.842134 65.9) (end 134.75 65.9) (width 0.1524) (layer F.Cu) (net 6))
+  (segment (start 134.75 65.9) (end 132.6228 65.9) (width 0.1524) (layer F.Cu) (net 6))
+  (segment (start 134.902434 65.9) (end 134.951217 65.851217) (width 0.1524) (layer F.Cu) (net 6))
+  (segment (start 134.75 65.9) (end 134.902434 65.9) (width 0.1524) (layer F.Cu) (net 6))
+  (segment (start 138.442134 62.3603) (end 138.351217 62.451217) (width 0.1524) (layer F.Cu) (net 6))
+  (segment (start 138.442143 62.360291) (end 138.351217 62.451217) (width 0.1524) (layer F.Cu) (net 6))
+  (segment (start 138.351217 62.451217) (end 134.951217 65.851217) (width 0.1524) (layer F.Cu) (net 6))
+  (segment (start 138.502434 62.3) (end 138.351217 62.451217) (width 0.1524) (layer F.Cu) (net 6))
+  (segment (start 138.8 62.3) (end 138.7 62.3) (width 0.1524) (layer F.Cu) (net 6))
+  (segment (start 138.8 62.3) (end 138.502434 62.3) (width 0.1524) (layer F.Cu) (net 6))
+  (segment (start 140.3772 62.3) (end 138.8 62.3) (width 0.1524) (layer F.Cu) (net 6))
+
+)

raspi4_pcie/raspi4_pcie.kicad_pcb-bak

@@ -0,0 +1,348 @@
+(kicad_pcb (version 20171130) (host pcbnew 5.1.2)
+
+  (general
+    (thickness 1.6)
+    (drawings 6)
+    (tracks 54)
+    (zones 0)
+    (modules 1)
+    (nets 7)
+  )
+
+  (page A4)
+  (layers
+    (0 F.Cu signal)
+    (31 B.Cu signal)
+    (32 B.Adhes user)
+    (33 F.Adhes user)
+    (34 B.Paste user)
+    (35 F.Paste user)
+    (36 B.SilkS user)
+    (37 F.SilkS user)
+    (38 B.Mask user)
+    (39 F.Mask user)
+    (40 Dwgs.User user)
+    (41 Cmts.User user)
+    (42 Eco1.User user)
+    (43 Eco2.User user)
+    (44 Edge.Cuts user)
+    (45 Margin user)
+    (46 B.CrtYd user)
+    (47 F.CrtYd user)
+    (48 B.Fab user)
+    (49 F.Fab user)
+  )
+
+  (setup
+    (last_trace_width 0.1016)
+    (trace_clearance 0.127)
+    (zone_clearance 0.508)
+    (zone_45_only no)
+    (trace_min 0.1016)
+    (via_size 0.3)
+    (via_drill 0.2)
+    (via_min_size 0.2)
+    (via_min_drill 0.2)
+    (uvia_size 0.3)
+    (uvia_drill 0.1)
+    (uvias_allowed no)
+    (uvia_min_size 0.2)
+    (uvia_min_drill 0.1)
+    (edge_width 0.05)
+    (segment_width 0.2)
+    (pcb_text_width 0.3)
+    (pcb_text_size 1.5 1.5)
+    (mod_edge_width 0.12)
+    (mod_text_size 1 1)
+    (mod_text_width 0.15)
+    (pad_size 1.524 1.524)
+    (pad_drill 0.762)
+    (pad_to_mask_clearance 0.051)
+    (solder_mask_min_width 0.25)
+    (aux_axis_origin 0 0)
+    (visible_elements FFFFFF7F)
+    (pcbplotparams
+      (layerselection 0x010fc_ffffffff)
+      (usegerberextensions false)
+      (usegerberattributes false)
+      (usegerberadvancedattributes false)
+      (creategerberjobfile false)
+      (excludeedgelayer true)
+      (linewidth 0.100000)
+      (plotframeref false)
+      (viasonmask false)
+      (mode 1)
+      (useauxorigin false)
+      (hpglpennumber 1)
+      (hpglpenspeed 20)
+      (hpglpendiameter 15.000000)
+      (psnegative false)
+      (psa4output false)
+      (plotreference true)
+      (plotvalue true)
+      (plotinvisibletext false)
+      (padsonsilk false)
+      (subtractmaskfromsilk false)
+      (outputformat 1)
+      (mirror false)
+      (drillshape 1)
+      (scaleselection 1)
+      (outputdirectory ""))
+  )
+
+  (net 0 "")
+  (net 1 /REFCLK_N)
+  (net 2 /REFCLK_P)
+  (net 3 /HSO0_N)
+  (net 4 /HSO0_P)
+  (net 5 /HSI0_N)
+  (net 6 /HSI0_P)
+
+  (net_class Default "This is the default net class."
+    (clearance 0.127)
+    (trace_width 0.1016)
+    (via_dia 0.3)
+    (via_drill 0.2)
+    (uvia_dia 0.3)
+    (uvia_drill 0.1)
+    (add_net /HSI0_N)
+    (add_net /HSI0_P)
+    (add_net /HSO0_N)
+    (add_net /HSO0_P)
+    (add_net /REFCLK_N)
+    (add_net /REFCLK_P)
+    (add_net "Net-(U1-Pad1)")
+    (add_net "Net-(U1-Pad10)")
+    (add_net "Net-(U1-Pad11)")
+    (add_net "Net-(U1-Pad12)")
+    (add_net "Net-(U1-Pad13)")
+    (add_net "Net-(U1-Pad14)")
+    (add_net "Net-(U1-Pad15)")
+    (add_net "Net-(U1-Pad16)")
+    (add_net "Net-(U1-Pad17)")
+    (add_net "Net-(U1-Pad18)")
+    (add_net "Net-(U1-Pad19)")
+    (add_net "Net-(U1-Pad2)")
+    (add_net "Net-(U1-Pad20)")
+    (add_net "Net-(U1-Pad21)")
+    (add_net "Net-(U1-Pad22)")
+    (add_net "Net-(U1-Pad23)")
+    (add_net "Net-(U1-Pad24)")
+    (add_net "Net-(U1-Pad25)")
+    (add_net "Net-(U1-Pad26)")
+    (add_net "Net-(U1-Pad29)")
+    (add_net "Net-(U1-Pad3)")
+    (add_net "Net-(U1-Pad32)")
+    (add_net "Net-(U1-Pad35)")
+    (add_net "Net-(U1-Pad36)")
+    (add_net "Net-(U1-Pad37)")
+    (add_net "Net-(U1-Pad38)")
+    (add_net "Net-(U1-Pad39)")
+    (add_net "Net-(U1-Pad4)")
+    (add_net "Net-(U1-Pad40)")
+    (add_net "Net-(U1-Pad41)")
+    (add_net "Net-(U1-Pad42)")
+    (add_net "Net-(U1-Pad43)")
+    (add_net "Net-(U1-Pad44)")
+    (add_net "Net-(U1-Pad45)")
+    (add_net "Net-(U1-Pad46)")
+    (add_net "Net-(U1-Pad47)")
+    (add_net "Net-(U1-Pad48)")
+    (add_net "Net-(U1-Pad49)")
+    (add_net "Net-(U1-Pad5)")
+    (add_net "Net-(U1-Pad50)")
+    (add_net "Net-(U1-Pad51)")
+    (add_net "Net-(U1-Pad52)")
+    (add_net "Net-(U1-Pad53)")
+    (add_net "Net-(U1-Pad54)")
+    (add_net "Net-(U1-Pad55)")
+    (add_net "Net-(U1-Pad56)")
+    (add_net "Net-(U1-Pad57)")
+    (add_net "Net-(U1-Pad6)")
+    (add_net "Net-(U1-Pad60)")
+    (add_net "Net-(U1-Pad63)")
+    (add_net "Net-(U1-Pad66)")
+    (add_net "Net-(U1-Pad67)")
+    (add_net "Net-(U1-Pad68)")
+    (add_net "Net-(U1-Pad7)")
+    (add_net "Net-(U1-Pad8)")
+    (add_net "Net-(U1-Pad9)")
+  )
+
+  (module raspi4_pcie:QFN-68_hack (layer F.Cu) (tedit 5D26C3F8) (tstamp 5D2741D3)
+    (at 136.5 65.5 90)
+    (descr "QFN, 68 Pin (https://cdn.microsemi.com/documents/1bf6886f-5919-4508-a50b-b1dbf3fdf0f4/download/#page=98), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py")
+    (tags "QFN DFN_QFN")
+    (path /5D284145)
+    (attr smd)
+    (fp_text reference U1 (at 0 -5.3 90) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value qfn_68_flipped (at 0 5.3 90) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start 4.6 -4.6) (end -4.6 -4.6) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 4.6 4.6) (end 4.6 -4.6) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -4.6 4.6) (end 4.6 4.6) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -4.6 -4.6) (end -4.6 4.6) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -4 -3) (end -3 -4) (layer F.Fab) (width 0.1))
+    (fp_line (start -4 4) (end -4 -3) (layer F.Fab) (width 0.1))
+    (fp_line (start 4 4) (end -4 4) (layer F.Fab) (width 0.1))
+    (fp_line (start 4 -4) (end 4 4) (layer F.Fab) (width 0.1))
+    (fp_line (start -3 -4) (end 4 -4) (layer F.Fab) (width 0.1))
+    (fp_line (start -3.56 -4.11) (end -4.11 -4.11) (layer F.SilkS) (width 0.12))
+    (fp_line (start 4.11 4.11) (end 4.11 3.56) (layer F.SilkS) (width 0.12))
+    (fp_line (start 3.56 4.11) (end 4.11 4.11) (layer F.SilkS) (width 0.12))
+    (fp_line (start -4.11 4.11) (end -4.11 3.56) (layer F.SilkS) (width 0.12))
+    (fp_line (start -3.56 4.11) (end -4.11 4.11) (layer F.SilkS) (width 0.12))
+    (fp_line (start 4.11 -4.11) (end 4.11 -3.56) (layer F.SilkS) (width 0.12))
+    (fp_line (start 3.56 -4.11) (end 4.11 -4.11) (layer F.SilkS) (width 0.12))
+    (pad 68 smd roundrect (at -3.2 -3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 67 smd roundrect (at -2.8 -3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 66 smd roundrect (at -2.4 -3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 65 smd roundrect (at -2 -3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 1 /REFCLK_N))
+    (pad 64 smd roundrect (at -1.6 -3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 2 /REFCLK_P))
+    (pad 63 smd roundrect (at -1.2 -3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 62 smd roundrect (at -0.8 -3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 5 /HSI0_N))
+    (pad 61 smd roundrect (at -0.4 -3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 6 /HSI0_P))
+    (pad 60 smd roundrect (at 0 -3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 59 smd roundrect (at 0.4 -3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 3 /HSO0_N))
+    (pad 58 smd roundrect (at 0.8 -3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 4 /HSO0_P))
+    (pad 57 smd roundrect (at 1.2 -3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 56 smd roundrect (at 1.6 -3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 55 smd roundrect (at 2 -3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 54 smd roundrect (at 2.4 -3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 53 smd roundrect (at 2.8 -3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 52 smd roundrect (at 3.2 -3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 51 smd roundrect (at 3.9375 -3.2 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 50 smd roundrect (at 3.9375 -2.8 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 49 smd roundrect (at 3.9375 -2.4 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 48 smd roundrect (at 3.9375 -2 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 47 smd roundrect (at 3.9375 -1.6 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 46 smd roundrect (at 3.9375 -1.2 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 45 smd roundrect (at 3.9375 -0.8 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 44 smd roundrect (at 3.9375 -0.4 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 43 smd roundrect (at 3.9375 0 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 42 smd roundrect (at 3.9375 0.4 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 41 smd roundrect (at 3.9375 0.8 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 40 smd roundrect (at 3.9375 1.2 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 39 smd roundrect (at 3.9375 1.6 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 38 smd roundrect (at 3.9375 2 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 37 smd roundrect (at 3.9375 2.4 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 36 smd roundrect (at 3.9375 2.8 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 35 smd roundrect (at 3.9375 3.2 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 34 smd roundrect (at 3.2 3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 6 /HSI0_P))
+    (pad 33 smd roundrect (at 2.8 3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 5 /HSI0_N))
+    (pad 32 smd roundrect (at 2.4 3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 31 smd roundrect (at 2 3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 4 /HSO0_P))
+    (pad 30 smd roundrect (at 1.6 3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 3 /HSO0_N))
+    (pad 29 smd roundrect (at 1.2 3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 28 smd roundrect (at 0.8 3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 2 /REFCLK_P))
+    (pad 27 smd roundrect (at 0.4 3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 1 /REFCLK_N))
+    (pad 26 smd roundrect (at 0 3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 25 smd roundrect (at -0.4 3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 24 smd roundrect (at -0.8 3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 23 smd roundrect (at -1.2 3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 22 smd roundrect (at -1.6 3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 21 smd roundrect (at -2 3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 20 smd roundrect (at -2.4 3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 19 smd roundrect (at -2.8 3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 18 smd roundrect (at -3.2 3.9375 90) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 17 smd roundrect (at -3.9375 3.2 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 16 smd roundrect (at -3.9375 2.8 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 15 smd roundrect (at -3.9375 2.4 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 14 smd roundrect (at -3.9375 2 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 13 smd roundrect (at -3.9375 1.6 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 12 smd roundrect (at -3.9375 1.2 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 11 smd roundrect (at -3.9375 0.8 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 10 smd roundrect (at -3.9375 0.4 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 9 smd roundrect (at -3.9375 0 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 8 smd roundrect (at -3.9375 -0.4 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 7 smd roundrect (at -3.9375 -0.8 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 6 smd roundrect (at -3.9375 -1.2 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 5 smd roundrect (at -3.9375 -1.6 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 4 smd roundrect (at -3.9375 -2 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 3 smd roundrect (at -3.9375 -2.4 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 2 smd roundrect (at -3.9375 -2.8 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+    (pad 1 smd roundrect (at -3.9375 -3.2 90) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  )
+
+  (gr_text "Raspi4\nPCIe to\nUSB3" (at 136.4 65.25) (layer B.SilkS)
+    (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+  )
+  (gr_text "THIS\nSIDE\nDOWN" (at 136.6 65.4) (layer F.SilkS)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (gr_line (start 132.5 69.5) (end 132.5 61.5) (layer Edge.Cuts) (width 0.05) (tstamp 5D272693))
+  (gr_line (start 140.5 69.5) (end 132.5 69.5) (layer Edge.Cuts) (width 0.05))
+  (gr_line (start 140.5 61.5) (end 140.5 69.5) (layer Edge.Cuts) (width 0.05))
+  (gr_line (start 132.5 61.5) (end 140.5 61.5) (layer Edge.Cuts) (width 0.05))
+
+  (segment (start 136.25 67.5) (end 136.297566 67.5) (width 0.1524) (layer F.Cu) (net 1))
+  (segment (start 132.6228 67.5) (end 136.25 67.5) (width 0.1524) (layer F.Cu) (net 1))
+  (segment (start 136.297566 67.5) (end 136.473783 67.323783) (width 0.1524) (layer F.Cu) (net 1))
+  (segment (start 136.357866 67.4397) (end 136.473783 67.323783) (width 0.1524) (layer F.Cu) (net 1))
+  (segment (start 138.697566 65.1) (end 138.523783 65.273783) (width 0.1524) (layer F.Cu) (net 1))
+  (segment (start 139.15 65.1) (end 138.697566 65.1) (width 0.1524) (layer F.Cu) (net 1))
+  (segment (start 136.473783 67.323783) (end 138.523783 65.273783) (width 0.1524) (layer F.Cu) (net 1))
+  (segment (start 138.757866 65.1) (end 139.15 65.1) (width 0.1524) (layer F.Cu) (net 1))
+  (segment (start 139.15 65.1) (end 140.3772 65.1) (width 0.1524) (layer F.Cu) (net 1))
+  (segment (start 136.15 67.1) (end 136.302434 67.1) (width 0.1524) (layer F.Cu) (net 2))
+  (segment (start 132.6228 67.1) (end 136.15 67.1) (width 0.1524) (layer F.Cu) (net 2))
+  (segment (start 136.302434 67.1) (end 136.476217 66.926217) (width 0.1524) (layer F.Cu) (net 2))
+  (segment (start 136.15 67.1) (end 136.242134 67.1) (width 0.1524) (layer F.Cu) (net 2))
+  (segment (start 138.95 64.7) (end 138.702434 64.7) (width 0.1524) (layer F.Cu) (net 2))
+  (segment (start 138.702434 64.7) (end 138.476217 64.926217) (width 0.1524) (layer F.Cu) (net 2))
+  (segment (start 138.95 64.7) (end 140.3772 64.7) (width 0.1524) (layer F.Cu) (net 2))
+  (segment (start 136.476217 66.926217) (end 138.476217 64.926217) (width 0.1524) (layer F.Cu) (net 2))
+  (segment (start 138.476217 64.926217) (end 138.642134 64.7603) (width 0.1524) (layer F.Cu) (net 2))
+  (segment (start 133.5 65.1135) (end 133.5738 65.0397) (width 0.1524) (layer B.Cu) (net 3))
+  (segment (start 133.5738 65.0397) (end 133.857866 65.0397) (width 0.1524) (layer B.Cu) (net 3))
+  (segment (start 133.857866 65.0397) (end 135.057866 63.8397) (width 0.1524) (layer B.Cu) (net 3))
+  (via (at 133.5 65.1135) (size 0.3) (drill 0.2) (layers F.Cu B.Cu) (net 3))
+  (segment (start 132.6228 65.1) (end 133.4262 65.1) (width 0.1524) (layer F.Cu) (net 3))
+  (segment (start 139.4262 63.8397) (end 135.057866 63.8397) (width 0.1524) (layer B.Cu) (net 3))
+  (segment (start 139.5 63.9135) (end 139.4262 63.8397) (width 0.1524) (layer B.Cu) (net 3))
+  (via (at 139.5 63.9135) (size 0.3) (drill 0.2) (layers F.Cu B.Cu) (net 3))
+  (segment (start 140.3772 63.9) (end 139.5738 63.9) (width 0.1524) (layer F.Cu) (net 3))
+  (via (at 139.5 63.4865) (size 0.3) (drill 0.2) (layers F.Cu B.Cu) (net 4))
+  (segment (start 133.5 64.6865) (end 133.5738 64.7603) (width 0.1524) (layer B.Cu) (net 4))
+  (segment (start 133.742134 64.7603) (end 134.942134 63.5603) (width 0.1524) (layer B.Cu) (net 4))
+  (segment (start 133.5738 64.7603) (end 133.742134 64.7603) (width 0.1524) (layer B.Cu) (net 4))
+  (segment (start 132.6228 64.7) (end 133.4262 64.7) (width 0.1524) (layer F.Cu) (net 4))
+  (via (at 133.5 64.6865) (size 0.3) (drill 0.2) (layers F.Cu B.Cu) (net 4))
+  (segment (start 139.4262 63.5603) (end 134.942134 63.5603) (width 0.1524) (layer B.Cu) (net 4))
+  (segment (start 139.5 63.4865) (end 139.4262 63.5603) (width 0.1524) (layer B.Cu) (net 4))
+  (segment (start 140.3772 63.5) (end 139.5738 63.5) (width 0.1524) (layer F.Cu) (net 4))
+  (segment (start 134.85 66.3) (end 132.6228 66.3) (width 0.1524) (layer F.Cu) (net 5))
+  (segment (start 134.85 66.3) (end 134.897566 66.3) (width 0.1524) (layer F.Cu) (net 5))
+  (segment (start 138.497566 62.7) (end 138.398783 62.798783) (width 0.1524) (layer F.Cu) (net 5))
+  (segment (start 138.85 62.7) (end 138.497566 62.7) (width 0.1524) (layer F.Cu) (net 5))
+  (segment (start 138.557866 62.7) (end 138.85 62.7) (width 0.1524) (layer F.Cu) (net 5))
+  (segment (start 134.897566 66.3) (end 138.398783 62.798783) (width 0.1524) (layer F.Cu) (net 5))
+  (segment (start 138.85 62.7) (end 140.3772 62.7) (width 0.1524) (layer F.Cu) (net 5))
+  (segment (start 134.842134 65.9) (end 134.75 65.9) (width 0.1524) (layer F.Cu) (net 6))
+  (segment (start 134.75 65.9) (end 132.6228 65.9) (width 0.1524) (layer F.Cu) (net 6))
+  (segment (start 134.902434 65.9) (end 134.951217 65.851217) (width 0.1524) (layer F.Cu) (net 6))
+  (segment (start 134.75 65.9) (end 134.902434 65.9) (width 0.1524) (layer F.Cu) (net 6))
+  (segment (start 138.442134 62.3603) (end 138.351217 62.451217) (width 0.1524) (layer F.Cu) (net 6))
+  (segment (start 138.442143 62.360291) (end 138.351217 62.451217) (width 0.1524) (layer F.Cu) (net 6))
+  (segment (start 138.351217 62.451217) (end 134.951217 65.851217) (width 0.1524) (layer F.Cu) (net 6))
+  (segment (start 138.502434 62.3) (end 138.351217 62.451217) (width 0.1524) (layer F.Cu) (net 6))
+  (segment (start 138.8 62.3) (end 138.7 62.3) (width 0.1524) (layer F.Cu) (net 6))
+  (segment (start 138.8 62.3) (end 138.502434 62.3) (width 0.1524) (layer F.Cu) (net 6))
+  (segment (start 140.3772 62.3) (end 138.8 62.3) (width 0.1524) (layer F.Cu) (net 6))
+
+)

raspi4_pcie/raspi4_pcie.pretty/QFN-68_hack.kicad_mod

@@ -0,0 +1,100 @@
+(module QFN-68_hack (layer F.Cu) (tedit 5D26C3F8)
+  (descr "QFN, 68 Pin (https://cdn.microsemi.com/documents/1bf6886f-5919-4508-a50b-b1dbf3fdf0f4/download/#page=98), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py")
+  (tags "QFN DFN_QFN")
+  (attr smd)
+  (fp_text reference REF** (at 0 -5.3) (layer F.SilkS)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_text value QFN-68_hack (at 0 5.3) (layer F.Fab)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_line (start 3.56 -4.11) (end 4.11 -4.11) (layer F.SilkS) (width 0.12))
+  (fp_line (start 4.11 -4.11) (end 4.11 -3.56) (layer F.SilkS) (width 0.12))
+  (fp_line (start -3.56 4.11) (end -4.11 4.11) (layer F.SilkS) (width 0.12))
+  (fp_line (start -4.11 4.11) (end -4.11 3.56) (layer F.SilkS) (width 0.12))
+  (fp_line (start 3.56 4.11) (end 4.11 4.11) (layer F.SilkS) (width 0.12))
+  (fp_line (start 4.11 4.11) (end 4.11 3.56) (layer F.SilkS) (width 0.12))
+  (fp_line (start -3.56 -4.11) (end -4.11 -4.11) (layer F.SilkS) (width 0.12))
+  (fp_line (start -3 -4) (end 4 -4) (layer F.Fab) (width 0.1))
+  (fp_line (start 4 -4) (end 4 4) (layer F.Fab) (width 0.1))
+  (fp_line (start 4 4) (end -4 4) (layer F.Fab) (width 0.1))
+  (fp_line (start -4 4) (end -4 -3) (layer F.Fab) (width 0.1))
+  (fp_line (start -4 -3) (end -3 -4) (layer F.Fab) (width 0.1))
+  (fp_line (start -4.6 -4.6) (end -4.6 4.6) (layer F.CrtYd) (width 0.05))
+  (fp_line (start -4.6 4.6) (end 4.6 4.6) (layer F.CrtYd) (width 0.05))
+  (fp_line (start 4.6 4.6) (end 4.6 -4.6) (layer F.CrtYd) (width 0.05))
+  (fp_line (start 4.6 -4.6) (end -4.6 -4.6) (layer F.CrtYd) (width 0.05))
+  (pad 1 smd roundrect (at -3.9375 -3.2) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 2 smd roundrect (at -3.9375 -2.8) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 3 smd roundrect (at -3.9375 -2.4) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 4 smd roundrect (at -3.9375 -2) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 5 smd roundrect (at -3.9375 -1.6) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 6 smd roundrect (at -3.9375 -1.2) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 7 smd roundrect (at -3.9375 -0.8) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 8 smd roundrect (at -3.9375 -0.4) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 9 smd roundrect (at -3.9375 0) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 10 smd roundrect (at -3.9375 0.4) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 11 smd roundrect (at -3.9375 0.8) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 12 smd roundrect (at -3.9375 1.2) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 13 smd roundrect (at -3.9375 1.6) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 14 smd roundrect (at -3.9375 2) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 15 smd roundrect (at -3.9375 2.4) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 16 smd roundrect (at -3.9375 2.8) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 17 smd roundrect (at -3.9375 3.2) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 18 smd roundrect (at -3.2 3.9375) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 19 smd roundrect (at -2.8 3.9375) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 20 smd roundrect (at -2.4 3.9375) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 21 smd roundrect (at -2 3.9375) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 22 smd roundrect (at -1.6 3.9375) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 23 smd roundrect (at -1.2 3.9375) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 24 smd roundrect (at -0.8 3.9375) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 25 smd roundrect (at -0.4 3.9375) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 26 smd roundrect (at 0 3.9375) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 27 smd roundrect (at 0.4 3.9375) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 28 smd roundrect (at 0.8 3.9375) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 29 smd roundrect (at 1.2 3.9375) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 30 smd roundrect (at 1.6 3.9375) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 31 smd roundrect (at 2 3.9375) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 32 smd roundrect (at 2.4 3.9375) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 33 smd roundrect (at 2.8 3.9375) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 34 smd roundrect (at 3.2 3.9375) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 35 smd roundrect (at 3.9375 3.2) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 36 smd roundrect (at 3.9375 2.8) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 37 smd roundrect (at 3.9375 2.4) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 38 smd roundrect (at 3.9375 2) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 39 smd roundrect (at 3.9375 1.6) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 40 smd roundrect (at 3.9375 1.2) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 41 smd roundrect (at 3.9375 0.8) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 42 smd roundrect (at 3.9375 0.4) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 43 smd roundrect (at 3.9375 0) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 44 smd roundrect (at 3.9375 -0.4) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 45 smd roundrect (at 3.9375 -0.8) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 46 smd roundrect (at 3.9375 -1.2) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 47 smd roundrect (at 3.9375 -1.6) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 48 smd roundrect (at 3.9375 -2) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 49 smd roundrect (at 3.9375 -2.4) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 50 smd roundrect (at 3.9375 -2.8) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 51 smd roundrect (at 3.9375 -3.2) (size 0.825 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 52 smd roundrect (at 3.2 -3.9375) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 53 smd roundrect (at 2.8 -3.9375) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 54 smd roundrect (at 2.4 -3.9375) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 55 smd roundrect (at 2 -3.9375) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 56 smd roundrect (at 1.6 -3.9375) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 57 smd roundrect (at 1.2 -3.9375) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 58 smd roundrect (at 0.8 -3.9375) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 59 smd roundrect (at 0.4 -3.9375) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 60 smd roundrect (at 0 -3.9375) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 61 smd roundrect (at -0.4 -3.9375) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 62 smd roundrect (at -0.8 -3.9375) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 63 smd roundrect (at -1.2 -3.9375) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 64 smd roundrect (at -1.6 -3.9375) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 65 smd roundrect (at -2 -3.9375) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 66 smd roundrect (at -2.4 -3.9375) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 67 smd roundrect (at -2.8 -3.9375) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 68 smd roundrect (at -3.2 -3.9375) (size 0.2 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (model ${KISYS3DMOD}/Package_DFN_QFN.3dshapes/QFN-68-1EP_8x8mm_P0.4mm_EP5.2x5.2mm.wrl
+    (at (xyz 0 0 0))
+    (scale (xyz 1 1 1))
+    (rotate (xyz 0 0 0))
+  )
+)

raspi4_pcie/raspi4_pcie.pro

@@ -0,0 +1,241 @@
+update=Thu 11 Jul 2019 07:34:52 AM CEST
+version=1
+last_client=kicad
+[general]
+version=1
+RootSch=
+BoardNm=
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+[pcbnew]
+version=1
+PageLayoutDescrFile=
+LastNetListRead=
+CopperLayerCount=2
+BoardThickness=1.6
+AllowMicroVias=0
+AllowBlindVias=0
+RequireCourtyardDefinitions=0
+ProhibitOverlappingCourtyards=1
+MinTrackWidth=0.1016
+MinViaDiameter=0.2
+MinViaDrill=0.2
+MinMicroViaDiameter=0.2
+MinMicroViaDrill=0.09999999999999999
+MinHoleToHole=0.25
+TrackWidth1=0.1016
+ViaDiameter1=0.3
+ViaDrill1=0.2
+dPairWidth1=0.2
+dPairGap1=0.25
+dPairViaGap1=0.25
+dPairWidth2=0.1524
+dPairGap2=0.127
+dPairViaGap2=0.254
+SilkLineWidth=0.12
+SilkTextSizeV=1
+SilkTextSizeH=1
+SilkTextSizeThickness=0.15
+SilkTextItalic=0
+SilkTextUpright=1
+CopperLineWidth=0.2
+CopperTextSizeV=1.5
+CopperTextSizeH=1.5
+CopperTextThickness=0.3
+CopperTextItalic=0
+CopperTextUpright=1
+EdgeCutLineWidth=0.05
+CourtyardLineWidth=0.05
+OthersLineWidth=0.15
+OthersTextSizeV=1
+OthersTextSizeH=1
+OthersTextSizeThickness=0.15
+OthersTextItalic=0
+OthersTextUpright=1
+SolderMaskClearance=0.051
+SolderMaskMinWidth=0.25
+SolderPasteClearance=0
+SolderPasteRatio=-0
+[pcbnew/Layer.F.Cu]
+Name=F.Cu
+Type=0
+Enabled=1
+[pcbnew/Layer.In1.Cu]
+Name=In1.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In2.Cu]
+Name=In2.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In3.Cu]
+Name=In3.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In4.Cu]
+Name=In4.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In5.Cu]
+Name=In5.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In6.Cu]
+Name=In6.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In7.Cu]
+Name=In7.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In8.Cu]
+Name=In8.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In9.Cu]
+Name=In9.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In10.Cu]
+Name=In10.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In11.Cu]
+Name=In11.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In12.Cu]
+Name=In12.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In13.Cu]
+Name=In13.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In14.Cu]
+Name=In14.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In15.Cu]
+Name=In15.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In16.Cu]
+Name=In16.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In17.Cu]
+Name=In17.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In18.Cu]
+Name=In18.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In19.Cu]
+Name=In19.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In20.Cu]
+Name=In20.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In21.Cu]
+Name=In21.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In22.Cu]
+Name=In22.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In23.Cu]
+Name=In23.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In24.Cu]
+Name=In24.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In25.Cu]
+Name=In25.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In26.Cu]
+Name=In26.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In27.Cu]
+Name=In27.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In28.Cu]
+Name=In28.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In29.Cu]
+Name=In29.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In30.Cu]
+Name=In30.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.B.Cu]
+Name=B.Cu
+Type=0
+Enabled=1
+[pcbnew/Layer.B.Adhes]
+Enabled=1
+[pcbnew/Layer.F.Adhes]
+Enabled=1
+[pcbnew/Layer.B.Paste]
+Enabled=1
+[pcbnew/Layer.F.Paste]
+Enabled=1
+[pcbnew/Layer.B.SilkS]
+Enabled=1
+[pcbnew/Layer.F.SilkS]
+Enabled=1
+[pcbnew/Layer.B.Mask]
+Enabled=1
+[pcbnew/Layer.F.Mask]
+Enabled=1
+[pcbnew/Layer.Dwgs.User]
+Enabled=1
+[pcbnew/Layer.Cmts.User]
+Enabled=1
+[pcbnew/Layer.Eco1.User]
+Enabled=1
+[pcbnew/Layer.Eco2.User]
+Enabled=1
+[pcbnew/Layer.Edge.Cuts]
+Enabled=1
+[pcbnew/Layer.Margin]
+Enabled=1
+[pcbnew/Layer.B.CrtYd]
+Enabled=1
+[pcbnew/Layer.F.CrtYd]
+Enabled=1
+[pcbnew/Layer.B.Fab]
+Enabled=1
+[pcbnew/Layer.F.Fab]
+Enabled=1
+[pcbnew/Layer.Rescue]
+Enabled=0
+[pcbnew/Netclasses]
+[pcbnew/Netclasses/Default]
+Name=Default
+Clearance=0.127
+TrackWidth=0.1016
+ViaDiameter=0.3
+ViaDrill=0.2
+uViaDiameter=0.3
+uViaDrill=0.1
+dPairWidth=0.2
+dPairGap=0.25
+dPairViaGap=0.25

raspi4_pcie/raspi4_pcie.sch

@@ -0,0 +1,111 @@
+EESchema Schematic File Version 4
+EELAYER 29 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+Text Label 3050 2250 2    50   ~ 0
+SSTX_P
+Text Label 3050 2350 2    50   ~ 0
+SSTX_N
+Text Label 3050 2550 2    50   ~ 0
+SSRX_P
+Text Label 3050 2650 2    50   ~ 0
+SSRX_N
+Text Label 3050 2850 2    50   ~ 0
+USB2_P
+Text Label 3050 2950 2    50   ~ 0
+USB2_N
+Wire Wire Line
+	3050 2250 3250 2250
+Wire Wire Line
+	3050 2350 3250 2350
+Wire Wire Line
+	3050 2550 3250 2550
+Wire Wire Line
+	3050 2650 3250 2650
+Wire Wire Line
+	3050 2850 3250 2850
+Wire Wire Line
+	3050 2950 3250 2950
+Text Label 5650 2850 0    50   ~ 0
+HSO0_P
+Text Label 5650 2950 0    50   ~ 0
+HSO0_N
+Text Label 5650 3150 0    50   ~ 0
+HSI0_P
+Text Label 5650 3250 0    50   ~ 0
+HSI0_N
+Text Label 5650 3450 0    50   ~ 0
+REFCLK_P
+Text Label 5650 3550 0    50   ~ 0
+REFCLK_N
+Wire Wire Line
+	5450 2850 5650 2850
+Wire Wire Line
+	5450 2950 5650 2950
+Wire Wire Line
+	5450 3150 5650 3150
+Wire Wire Line
+	5450 3250 5650 3250
+Wire Wire Line
+	5450 3450 5650 3450
+Wire Wire Line
+	5450 3550 5650 3550
+Text Label 3950 4950 2    50   ~ 0
+SSTX_P
+Text Label 3950 5050 2    50   ~ 0
+SSTX_N
+Text Label 3950 5250 2    50   ~ 0
+SSRX_P
+Text Label 3950 5350 2    50   ~ 0
+SSRX_N
+Text Label 3950 5550 2    50   ~ 0
+USB2_P
+Text Label 3950 5650 2    50   ~ 0
+USB2_N
+Text Label 4400 4950 0    50   ~ 0
+HSI0_P
+Text Label 4400 5050 0    50   ~ 0
+HSI0_N
+Text Label 4400 5550 0    50   ~ 0
+REFCLK_P
+Text Label 4400 5650 0    50   ~ 0
+REFCLK_N
+Text Label 4400 5350 0    50   ~ 0
+HSO0_N
+Text Label 4400 5250 0    50   ~ 0
+HSO0_P
+Wire Wire Line
+	3950 4950 4400 4950
+Wire Wire Line
+	3950 5050 4400 5050
+Wire Wire Line
+	3950 5250 4400 5250
+Wire Wire Line
+	3950 5350 4400 5350
+Wire Wire Line
+	3950 5550 4400 5550
+Wire Wire Line
+	3950 5650 4400 5650
+$Comp
+L qfn_68:qfn_68_flipped U1
+U 1 1 5D284145
+P 4400 3050
+F 0 "U1" H 4950 1700 50  0000 L CNN
+F 1 "qfn_68_flipped" H 4950 1800 50  0000 L CNN
+F 2 "raspi4_pcie:QFN-68_hack" H 4400 3050 50  0001 C CNN
+F 3 "" H 4400 3050 50  0001 C CNN
+	1    4400 3050
+	1    0    0    -1  
+$EndComp
+$EndSCHEMATC

raspi4_pcie/sym-lib-table

@@ -0,0 +1,3 @@
+(sym_lib_table
+  (lib (name qfn_68)(type Legacy)(uri ${KIPRJMOD}/qfn_68.lib)(options "")(descr ""))
+)